Datasheet Texas Instruments SN74ALS112ADR — 数据表
| 制造商 | Texas Instruments |
| 系列 | SN74ALS112A |
| 零件号 | SN74ALS112ADR |
具有清晰和预设16-SOIC的双路JK负缘触发触发器0至70
数据表
Dual J-K Negative-Edge-Triggered Flip-Flops With Clear And Preset datasheet
PDF, 988 Kb, 修订版: A, 档案已发布: Dec 1, 1994
从文件中提取
价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
打包
| Pin | 16 |
| Package Type | D |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2500 |
| Carrier | LARGE T&R |
| Device Marking | ALS112A |
| Width (mm) | 3.91 |
| Length (mm) | 9.9 |
| Thickness (mm) | 1.58 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 1.75 |
| Mechanical Data | 下载 |
参数化
| Approx. Price (US$) | 0.44 | 1ku |
| Bits(#) | 2 |
| F @ Nom Voltage(Max)(Mhz) | 75 |
| ICC @ Nom Voltage(Max)(mA) | 4.5 |
| Output Drive (IOL/IOH)(Max)(mA) | -0.4/8 |
| Package Group | SOIC |
| Package Size: mm2:W x L (PKG) | See datasheet (PDIP) |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | ALS |
| VCC(Max)(V) | 5.5 |
| VCC(Min)(V) | 4.5 |
| Voltage(Nom)(V) | 5 |
| tpd @ Nom Voltage(Max)(ns) | 18 |
生态计划
| RoHS | Compliant |
| Pb Free | Yes |
应用须知
- Advanced Schottky (ALS and AS) Logic FamiliesPDF, 1.9 Mb, 档案已发布: Aug 1, 1995
This document introduces the advanced Schottky family of clamped TTL integrated circuits (ICs). Detailed electrical characteristics of the 'AS and 'ALS devices with table formats are provided. Guidelines for designing high-performance digital systems using the Advanced Schottky family are given along with a brief summary of the solutions to most design decisions needed to implement systems using t
模型线
系列: SN74ALS112A (5)
- SN74ALS112AD SN74ALS112ADR SN74ALS112AN SN74ALS112AN3 SN74ALS112ANSR
制造商分类
- Semiconductors > Logic > Flip-Flop/Latch/Register > J-K Flip-Flop