Datasheet Texas Instruments TLC2654IP — 数据表

低噪声斩波稳定运算放大器8-PDIP

数据表

PDF, 1.2 Mb, 修订版: G, 档案已发布: Apr 25, 2001

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Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

Additional Features	Zero Drift
Architecture	CMOS
CMRR(Min)	105 dB
CMRR(Typ)	125 dB
GBW(Typ)	1.9 MHz
Input Bias Current(Max)	60 pA
Iq per channel(Max)	2.4 mA
Iq per channel(Typ)	1.5 mA
Number of Channels	1
Offset Drift(Typ)	0.01 uV/C
Operating Temperature Range	-40 to 85,0 to 70 C
Output Current(Typ)	3 mA
Package Group	PDIP
Package Size: mm2:W x L	See datasheet (PDIP) PKG
Rail-to-Rail	In to V-,Out
Rating	Catalog
Slew Rate(Typ)	2.8 V/us
Total Supply Voltage(Max)	16 +5V=5, +/-5V=10
Total Supply Voltage(Min)	4.6 +5V=5, +/-5V=10
Vn at 1kHz(Typ)	23 nV/rtHz
Vos (Offset Voltage @ 25C)(Max)	0.02 mV

RoHS	Compliant
Pb Free	Yes

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系列: TLC2654 (14)

Semiconductors > Amplifiers > Operational Amplifiers (Op Amps) > Precision Op Amps