Datasheet Texas Instruments ADC12D1000CIUT/NOPB — 数据表
| 制造商 | Texas Instruments |
| 系列 | ADC12D1000 |
| 零件号 | ADC12D1000CIUT/NOPB |
12位，双路1.0-GSPS或单路2.0-GSPS模数转换器（ADC）292-BGA -40至85
数据表
ADC12D1x00 12-Bit, 2.0/3.2 GSPS Ultra High-Speed ADC datasheet
PDF, 3.6 Mb, 修订版: N, 档案已发布: Aug 31, 2015
从文件中提取
价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
打包
| Pin | 292 |
| Package Type | NXA |
| Industry STD Term | BGA |
| JEDEC Code | S-PBGA-N |
| Package QTY | 40 |
| Carrier | JEDEC TRAY (10+1) |
| Device Marking | ADC12D1000CIUT |
| Width (mm) | 27 |
| Length (mm) | 27 |
| Thickness (mm) | 2.38 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 2.4 |
| Mechanical Data | 下载 |
参数化
| # Input Channels | 2,1 |
| Analog Input BW | 2800 MHz |
| Architecture | Folding Interpolating |
| DNL(Max) | 0.4 +/-LSB |
| DNL(Typ) | 0.4 +/-LSB |
| ENOB | 9.6 Bits |
| INL(Max) | 2.5 +/-LSB |
| INL(Typ) | 2.5 +/-LSB |
| Input Buffer | Yes |
| Input Range | 0.8 Vp-p |
| Interface | Parallel LVDS |
| Operating Temperature Range | -40 to 85 C |
| Package Group | BGA |
| Package Size: mm2:W x L | 292BGA: 729 mm2: 27 x 27(BGA) PKG |
| Power Consumption(Typ) | 3380 mW |
| Rating | Catalog |
| Reference Mode | Int |
| Resolution | 12 Bits |
| SFDR | 71 dB |
| SINAD | 59.7 dB |
| SNR | 60.2 dB |
| Sample Rate(Max) | 1000,2000 MSPS |
生态计划
| RoHS | Compliant |
设计套件和评估模块
- Evaluation Modules & Boards: ADC12D1600RB
12-Bit, Dual 1.6/1.8 GSPS or Single 3.2/3.6 GSPS A/D Converter Reference Board
Lifecycle Status: Active (Recommended for new designs)
应用须知
- From Sample Instant to Data Output: Understanding Latency in the GSPS ADCPDF, 392 Kb, 档案已发布: Dec 18, 2012
For many applications which use ultra high-speed ADCs, latency can be a critical performance specification. For example, if the ADC is used in any kind of feedback loop, then the absolute latency is an important factor. For a MIMO system such as a phased array radar, the relative difference and variability in latency becomes important. This application note covers latency in the GSPS ADC products, - Maximizing SFDR Performance in the GSPS ADC: Spur Sources and Methods of MitigatPDF, 720 Kb, 档案已发布: Dec 9, 2013
The SFDR performance of an ADC is limited by the largest spur in the spectrum from DC to Fs / 2. These spurs can either be reduced or avoided entirely for maximum SFDR performance, based on the application. This reference design explores the reason behind spurs in the 10-bit and 12-bit GSPS ADCfamily. The specific products covered are: ADC12D1800RF, ADC12D1600RF, ADC12D1000RF, ADC12D800RF, ADC12 - AN-2128 ADC1xD1x00 Pin Compatibility (Rev. C)PDF, 60 Kb, 修订版: C, 档案已发布: May 1, 2013
In order to facilitate upgrading applications from a 10-bit Gig ADC to a 12-bit Gig ADC, the ADC10D1x00(ADC10D1500/ADC10D1000) is designed to be pin-compatible with the ADC12D1x00(ADC12D1800/1600/1000). This means that a single board layout may be designed with both resolutionADCs in mind for more cost efficient and time-to-market product development. - AN-2177 Using the LMH6554 as a ADC Driver (Rev. A)PDF, 1.7 Mb, 修订版: A, 档案已发布: Apr 26, 2013
This application report discusses the use of the Texas Instruments LMH6554 as an ADC driver. - AN-2132 Synchronizing Multiple GSPS ADCs in a System: The AutoSync Feature (Rev. G)PDF, 169 Kb, 修订版: G, 档案已发布: Feb 3, 2017
模型线
系列: ADC12D1000 (2)
- ADC12D1000CIUT ADC12D1000CIUT/NOPB
制造商分类
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > High Speed ADCs (>10MSPS)