Datasheet Texas Instruments TLV1570CDWR — 数据表
| 制造商 | Texas Instruments |
| 系列 | TLV1570 |
| 零件号 | TLV1570CDWR |
10位，1.25 MSPS ADC 8通道，DSP /（Q）SPI IF，可编程内部参考，自动或软件掉电，极低功耗20-SOIC 0至70
数据表
2.7 V To 5.5 V 8-Channel 10-Bit 1.25-MSPS Serial Analog-to-Digital Converter datasheet
PDF, 1.0 Mb, 修订版: B, 档案已发布: Oct 13, 2000
从文件中提取
价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
打包
| Pin | 20 |
| Package Type | DW |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2000 |
| Carrier | LARGE T&R |
| Device Marking | TLV1570C |
| Width (mm) | 7.5 |
| Length (mm) | 12.8 |
| Thickness (mm) | 2.35 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 2.65 |
| Mechanical Data | 下载 |
参数化
| # Input Channels | 8 |
| Analog Voltage AVDD(Max) | 5.5 V |
| Analog Voltage AVDD(Min) | 2.7 V |
| Architecture | SAR |
| Digital Supply(Max) | 5.5 V |
| Digital Supply(Min) | 2.7 V |
| INL(Max) | 1 +/-LSB |
| Input Range(Max) | 5.5 V |
| Input Type | Single-Ended |
| Integrated Features | N/A |
| Interface | SPI |
| Multi-Channel Configuration | Multiplexed |
| Operating Temperature Range | -40 to 85,0 to 70 C |
| Package Group | SOIC |
| Package Size: mm2:W x L | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) PKG |
| Power Consumption(Typ) | 8 mW |
| Rating | Catalog |
| Reference Mode | Ext,Int |
| Resolution | 10 Bits |
| SINAD | 60 dB |
| SNR | 61 dB |
| Sample Rate (max) | 1.25MSPS SPS |
| Sample Rate(Max) | 1.25 MSPS |
| THD(Typ) | -72 dB |
生态计划
| RoHS | Compliant |
应用须知
- Using the TMS320C5402 DMA Channels to Read from the TLV1570 ADCPDF, 423 Kb, 档案已发布: Jun 22, 2000
This application report presents hardware and software solutions for using the DMA channels of the 16-bit, fixed-point TMS320C5402 DSP to collect digital samples from the TLV1570 10-bit, 1.25-MSPS, 8-channel, serial analog-to-digital converter. - Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, 档案已发布: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
模型线
系列: TLV1570 (11)
制造商分类
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)