Datasheet Texas Instruments DAC5672MPFBEP — 数据表

制造商Texas Instruments
系列DAC5672-EP
零件号DAC5672MPFBEP
Datasheet Texas Instruments DAC5672MPFBEP

增强型产品双14位200Msps数模转换器48-TQFP -55至125

数据表

DAC5672-EP datasheet
PDF, 1.2 Mb, 修订版: A, 档案已发布: Oct 10, 2006
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin48
Package TypePFB
Industry STD TermTQFP
JEDEC CodeS-PQFP-G
Package QTY250
CarrierJEDEC TRAY (10+1)
Device MarkingDAC5672EP
Width (mm)7
Length (mm)7
Thickness (mm)1
Pitch (mm).5
Max Height (mm)1.2
Mechanical Data下载

参数化

ArchitectureCurrent Source
DAC Channels2
DNL(Max)3 +/-LSB
INL(Max)4 +/-LSB
InterfaceParallel CMOS
Operating Temperature Range-55 to 125 C
Output Range Max.20 mA
Output Range Min.2 mA
Output TypeCurrent
Package GroupTQFP
Package Size: mm2:W x L48TQFP: 81 mm2: 9 x 9(TQFP) PKG
Power Consumption(Typ)330 mW
RatingHiRel Enhanced Product
Reference: TypeInt
Resolution14 Bits
SFDR84 dB
SNR77 dB
Sample / Update Rate275 MSPS
Settling Time0.02 µs

生态计划

RoHSCompliant

设计套件和评估模块

  • Evaluation Modules & Boards: TSW2200EVM
    TSW2200 Low-Cost Portable Power Supply Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

应用须知

  • High Speed Digital-to-Analog Converters Basics (Rev. A)
    PDF, 829 Kb, 修订版: A, 档案已发布: Oct 23, 2012
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, 档案已发布: Jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, 档案已发布: Jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers

模型线

制造商分类

  • Semiconductors > Space & High Reliability > Data Converter > Digital to Analog Converters