Datasheet Texas Instruments SN74ALVC244DWG4 — 数据表

制造商	Texas Instruments
系列	SN74ALVC244
零件号	SN74ALVC244DWG4

具有三态输出的八路缓冲器/驱动器20-SOIC -40至85

数据表

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PDF, 1.3 Mb, 修订版: G, 档案已发布: Aug 31, 2004

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价格

状态

Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

打包

Pin	20
Package Type	DW
Industry STD Term	SOIC
JEDEC Code	R-PDSO-G
Package QTY	25
Carrier	TUBE
Device Marking	ALVC244
Width (mm)	7.5
Length (mm)	12.8
Thickness (mm)	2.35
Pitch (mm)	1.27
Max Height (mm)	2.65
Mechanical Data	下载

参数化

Bits	8
F @ Nom Voltage(Max)	100 Mhz
ICC @ Nom Voltage(Max)	0.024 mA
Operating Temperature Range	-40 to 85 C
Output Drive (IOL/IOH)(Max)	-24/24 mA
Package Group	SOIC
Package Size: mm2:W x L	20SOIC: 132 mm2: 10.3 x 12.8(SOIC) PKG
Rating	Catalog
Schmitt Trigger	No
Technology Family	ALVC
VCC(Max)	3.6 V
VCC(Min)	1.65 V
Voltage(Nom)	1.8,2.5,2.7,3.3 V
tpd @ Nom Voltage(Max)	4.4,3.1,2.8 ns

生态计划

RoHS

Compliant

设计套件和评估模块

Evaluation Modules & Boards: LEDSPIMCUEVM-879
TPS92518 Dual Buck Evaluation Board with SPI Interface
Lifecycle Status: Active (Recommended for new designs)
- 下载
Development Kits: TMDSCNCD28379D
F28379D controlCARD for C2000 Real time control development kits
Lifecycle Status: Active (Recommended for new designs)
- 下载
Development Kits: TMDSDOCK28379D
F28379D Delfino Experimenter Kit
Lifecycle Status: Active (Recommended for new designs)
- 下载
Evaluation Modules & Boards: TMDXDOCK280049M
F280049M Experimenter's Kit for C2000 Real-Time Control Development Kits
Lifecycle Status: Active (Recommended for new designs)
- 下载

应用须知

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TI SN74ALVC16835 Component Specification Analysis for PC100
PDF, 43 Kb, 档案已发布: Aug 3, 1998
The PC100 standard establishes design parameters for the PC SDRAM DIMM that is designed to operate at 100 MHz. The 168-pin, 8-byte, registered SDRAM DIMM is a JEDEC-defined device (JC-42.5-96-146A). Some of the defined signal paths include data signals, address signals, and control signals. This application report discusses the SN74ALVC16835 18-bit universal bus driver that is available from T
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Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)
PDF, 96 Kb, 修订版: A, 档案已发布: May 13, 1998
Design of high-performance personal computer (PC) systems that are capable of meeting the needs imposed by modern operating systems and software includes the use of large banks of SDRAMs on DIMMs (see Figure 1).To meet the demands of stable functionality over the broad spectrum of operating environments, meet system timing needs, and to support data integrity, the loads presented by the large
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16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
PDF, 895 Kb, 修订版: B, 档案已发布: May 22, 2002
TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
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Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)
PDF, 154 Kb, 修订版: A, 档案已发布: Sep 8, 1999
In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families
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Understanding Advanced Bus-Interface Products Design Guide
PDF, 253 Kb, 档案已发布: May 1, 1996

模型线

系列: SN74ALVC244 (14)

SN74ALVC244DGVR SN74ALVC244DGVRG4 SN74ALVC244DW SN74ALVC244DWG4 SN74ALVC244DWR SN74ALVC244DWRE4 SN74ALVC244DWRG4 SN74ALVC244NSR SN74ALVC244NSRE4 SN74ALVC244PW SN74ALVC244PWE4 SN74ALVC244PWR SN74ALVC244PWRE4 SN74ALVC244RGYR

制造商分类

Semiconductors > Logic > Buffer/Driver/Transceiver > Non-Inverting Buffer/Driver