Datasheet Texas Instruments SN74LVC112APW — 数据表
制造商 | Texas Instruments |
系列 | SN74LVC112A |
零件号 | SN74LVC112APW |
具有清晰和预设16-TSSOP的双路负缘触发JK触发器-40至125
数据表
SN74LVC112A Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset datasheet
PDF, 980 Kb, 修订版: M, 档案已发布: Dec 26, 2014
从文件中提取
价格
状态
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | No |
打包
Pin | 16 |
Package Type | PW |
Industry STD Term | TSSOP |
JEDEC Code | R-PDSO-G |
Package QTY | 90 |
Carrier | TUBE |
Device Marking | LC112A |
Width (mm) | 4.4 |
Length (mm) | 5 |
Thickness (mm) | 1 |
Pitch (mm) | .65 |
Max Height (mm) | 1.2 |
Mechanical Data | 下载 |
参数化
Bits | 2 |
F @ Nom Voltage(Max) | 100 Mhz |
ICC @ Nom Voltage(Max) | 0.01 mA |
Output Drive (IOL/IOH)(Max) | -24/24 mA |
Package Group | TSSOP |
Package Size: mm2:W x L | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) PKG |
Rating | Catalog |
Schmitt Trigger | No |
Technology Family | LVC |
VCC(Max) | 3.6 V |
VCC(Min) | 2 V |
Voltage(Nom) | 3.3 V |
tpd @ Nom Voltage(Max) | 4.8 ns |
生态计划
RoHS | Compliant |
应用须知
- LVC Characterization InformationPDF, 114 Kb, 档案已发布: Dec 1, 1996
This document provides characterization information about low-voltage logic (LVL) that operates from a 3.3-V power supply. It addresses the issues of interfacing to 5-V logic ac performance power considerations input and output characteristics and signal integrity for this family of devices. - Use of the CMOS Unbuffered Inverter in Oscillator CircuitsPDF, 796 Kb, 档案已发布: Nov 6, 2003
CMOS devices have a high input impedance high gain and high bandwidth. These characteristics are similar to ideal amplifier characteristics and hence a CMOS buffer or inverter can be used in an oscillator circuit in conjunction with other passive components. Now CMOS oscillator circuits are widely used in high-speed applications because they are economical easy to use and take significantly
模型线
系列: SN74LVC112A (16)
制造商分类
- Semiconductors > Logic > Flip-Flop/Latch/Register > J-K Flip-Flop