Datasheet Texas Instruments ADS8412IBPFBTG4 — 数据表
| 制造商 | Texas Instruments |
| 系列 | ADS8412 |
| 零件号 | ADS8412IBPFBTG4 |
带参考的16位2MSPS并行ADC，单极性全差分输入48-TQFP -40至85
数据表
16-Bit 2 MSPS Unipolar Diff Input Micropower Sampling Analog-to-Digital Convert datasheet
PDF, 1.4 Mb, 修订版: A, 档案已发布: Dec 20, 2004
从文件中提取
价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
打包
| Pin | 48 | 48 |
| Package Type | PFB | PFB |
| Industry STD Term | TQFP | TQFP |
| JEDEC Code | S-PQFP-G | S-PQFP-G |
| Package QTY | 250 | 250 |
| Carrier | SMALL T&R | SMALL T&R |
| Device Marking | B | ADS8412I |
| Width (mm) | 7 | 7 |
| Length (mm) | 7 | 7 |
| Thickness (mm) | 1 | 1 |
| Pitch (mm) | .5 | .5 |
| Max Height (mm) | 1.2 | 1.2 |
| Mechanical Data | 下载 | 下载 |
参数化
| # Input Channels | 1 |
| Analog Voltage AVDD(Max) | 5.25 V |
| Analog Voltage AVDD(Min) | 4.75 V |
| Architecture | SAR |
| Digital Supply(Max) | 5.25 V |
| Digital Supply(Min) | 2.7 V |
| INL(Max) | 2.5 +/-LSB |
| Input Range(Max) | 4.2 V |
| Input Range(Min) | 4.2 V |
| Input Type | Differential |
| Integrated Features | Oscillator |
| Interface | Parallel |
| Multi-Channel Configuration | N/A |
| Operating Temperature Range | -40 to 85 C |
| Package Group | TQFP |
| Package Size: mm2:W x L | 48TQFP: 81 mm2: 9 x 9(TQFP) PKG |
| Power Consumption(Typ) | 155 mW |
| Rating | Catalog |
| Reference Mode | Ext,Int |
| Resolution | 16 Bits |
| SINAD | 88 dB |
| SNR | 90 dB |
| Sample Rate (max) | 2MSPS SPS |
| Sample Rate(Max) | 2 MSPS |
| THD(Typ) | -95 dB |
生态计划
| RoHS | Compliant |
设计套件和评估模块
- Evaluation Modules & Boards: ADS8412EVM
ADS8412 Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
应用须知
- Using ADS8411/2 (16-Bit 2MSPS SAR) as a Serial ADCPDF, 438 Kb, 档案已发布: May 24, 2004
This application report discusses how to use a parallel ADC as a serial ADC by using a low-cost CPLD. This concept is tested with a Texas Instruments ADS8411/12 (16-bit, 2 MSPS SAR ADC) and an Altera(TM) MAX 3000A CPLD. A full solution with a schematic, layout, and software for programming the CPLD is presented at the end of the report. - Interfacing the ADS8402/ADS8412 to TMS320C6713 DSPPDF, 262 Kb, 档案已发布: Sep 23, 2004
This application report presents a solution for interfacing the ADS8402 and ADS8412 16-bit, parallel interface converters to the TMS320C6713 DSP. The hardware solution consists of existing and orderable hardware, specifically the ADS8402EVM, 'C6713 DSK, and 5-6K interface board. The software demonstrates how to use the EDMA controller to efficiently collect data from the data converter. Discussed - Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, 档案已发布: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
模型线
系列: ADS8412 (4)
- ADS8412IBPFBR ADS8412IBPFBT ADS8412IBPFBTG4 ADS8412IPFBT
制造商分类
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)