Datasheet Texas Instruments TLV1548QDBREP — 数据表

增强型产品低压10位Adc W /串行控制和8个模拟输入20-SSOP -40至125

数据表

PDF, 686 Kb, 修订版: A, 档案已发布: Dec 5, 2003

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Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

# Input Channels	8
Analog Voltage AVDD(Max)	5.5 V
Analog Voltage AVDD(Min)	2.7 V
Architecture	SAR
Digital Supply(Max)	5.5 V
Digital Supply(Min)	2.7 V
INL(Max)	1 +/-LSB
Interface	SPI
Operating Temperature Range	-40 to 125 C
Package Group	SSOP
Package Size: mm2:W x L	20SSOP: 56 mm2: 7.8 x 7.2(SSOP) PKG
Power Consumption(Typ)	1.05 mW
Rating	HiRel Enhanced Product
Reference Mode	Ext
Resolution	10 Bits
Sample Rate (max)	85kSPS SPS

RoHS

Compliant

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Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
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Determining Minimum Acquisition Times for SAR ADCs, part 2
PDF, 215 Kb, 档案已发布: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

系列: TLV1548-EP (2)

Semiconductors > Space & High Reliability > Data Converter > Analog to Digital Converters