Datasheet Texas Instruments ADC12D1800RF — 数据表

制造商Texas Instruments
系列ADC12D1800RF
Datasheet Texas Instruments ADC12D1800RF

12位,双路1.8GSPS或单路3.6SPS,RF采样模数转换器(ADC)

数据表

ADC12D1800RF 12-Bit, Single 3.6 GSPS RF Sampling ADC datasheet
PDF, 3.6 Mb, 修订版: J, 档案已发布: Nov 11, 2014
从文件中提取

价格

状态

ADC12D1800RFIUTADC12D1800RFIUT/NOPB
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoYes

打包

ADC12D1800RFIUTADC12D1800RFIUT/NOPB
N12
Pin292292
Package TypeNXANXA
Industry STD TermBGABGA
JEDEC CodeS-PBGA-NS-PBGA-N
Package QTY4040
CarrierJEDEC TRAY (10+1)JEDEC TRAY (10+1)
Device MarkingADC12D1800RFIUTADC12D1800RFIUT
Width (mm)2727
Length (mm)2727
Thickness (mm)2.382.38
Pitch (mm)1.271.27
Max Height (mm)2.42.4
Mechanical Data下载下载

参数化

Parameters / ModelsADC12D1800RFIUT
ADC12D1800RFIUT
ADC12D1800RFIUT/NOPB
ADC12D1800RFIUT/NOPB
# Input Channels2,12,1
Analog Input BW, MHz27002700
ArchitectureFolding InterpolatingFolding Interpolating
DNL(Max), +/-LSB0.40.4
DNL(Typ), +/-LSB0.40.4
ENOB, Bits9.39.3
INL(Max), +/-LSB2.52.5
INL(Typ), +/-LSB2.52.5
Input BufferYesYes
Input Range, Vp-p0.80.8
InterfaceParallel LVDSParallel LVDS
Operating Temperature Range, C-40 to 85-40 to 85
Package GroupBGABGA
Package Size: mm2:W x L, PKG292BGA: 729 mm2: 27 x 27(BGA)292BGA: 729 mm2: 27 x 27(BGA)
Power Consumption(Typ), mW44004400
RatingCatalogCatalog
Reference ModeIntInt
Resolution, Bits1212
SFDR, dB68.168.1
SINAD, dB57.757.7
SNR, dB58.658.6
Sample Rate(Max), MSPS1800,36001800,3600

生态计划

ADC12D1800RFIUTADC12D1800RFIUT/NOPB
RoHSSee ti.comCompliant

应用须知

  • Signal Chain Noise Figure Analysis
    PDF, 615 Kb, 档案已发布: Oct 29, 2014
  • Wide Bandwidth Receiver Implementation by Interleaving Two Giga-Sampling ADCs
    PDF, 621 Kb, 档案已发布: Dec 7, 2015
  • Synchronizing the Giga-Sample ADCs Interfaced with Multiple FPGAs
    PDF, 943 Kb, 档案已发布: Aug 6, 2014
  • AN-2128 ADC1xD1x00 Pin Compatibility (Rev. C)
    PDF, 60 Kb, 修订版: C, 档案已发布: May 1, 2013
    In order to facilitate upgrading applications from a 10-bit Gig ADC to a 12-bit Gig ADC, the ADC10D1x00(ADC10D1500/ADC10D1000) is designed to be pin-compatible with the ADC12D1x00(ADC12D1800/1600/1000). This means that a single board layout may be designed with both resolutionADCs in mind for more cost efficient and time-to-market product development.
  • AN-2177 Using the LMH6554 as a ADC Driver (Rev. A)
    PDF, 1.7 Mb, 修订版: A, 档案已发布: Apr 26, 2013
    This application report discusses the use of the Texas Instruments LMH6554 as an ADC driver.
  • From Sample Instant to Data Output: Understanding Latency in the GSPS ADC
    PDF, 392 Kb, 档案已发布: Dec 18, 2012
    For many applications which use ultra high-speed ADCs, latency can be a critical performance specification. For example, if the ADC is used in any kind of feedback loop, then the absolute latency is an important factor. For a MIMO system such as a phased array radar, the relative difference and variability in latency becomes important. This application note covers latency in the GSPS ADC products,
  • AN-2132 Synchronizing Multiple GSPS ADCs in a System: The AutoSync Feature (Rev. G)
    PDF, 169 Kb, 修订版: G, 档案已发布: Feb 3, 2017
  • Maximizing SFDR Performance in the GSPS ADC: Spur Sources and Methods of Mitigat
    PDF, 720 Kb, 档案已发布: Dec 9, 2013
    The SFDR performance of an ADC is limited by the largest spur in the spectrum from DC to Fs / 2. These spurs can either be reduced or avoided entirely for maximum SFDR performance, based on the application. This reference design explores the reason behind spurs in the 10-bit and 12-bit GSPS ADCfamily. The specific products covered are: ADC12D1800RF, ADC12D1600RF, ADC12D1000RF, ADC12D800RF, ADC12

模型线

系列: ADC12D1800RF (2)

制造商分类

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)