Datasheet Texas Instruments ADS42B49 — 数据表
| 制造商 | Texas Instruments |
| 系列 | ADS42B49 |
双通道，14位，250MSPS模数转换器（ADC）
数据表
ADS42B49 Dual-Channel, 14-Bit, 250-MSPS Ultralow-Power ADC with Analog Input Buffer datasheet
PDF, 1.5 Mb, 修订版: C, 档案已发布: Mar 30, 2016
从文件中提取
价格
状态
| ADS42B49IRGC25 | ADS42B49IRGCR | ADS42B49IRGCT | |
|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No | No |
打包
| ADS42B49IRGC25 | ADS42B49IRGCR | ADS42B49IRGCT | |
|---|---|---|---|
| N | 1 | 2 | 3 |
| Pin | 64 | 64 | 64 |
| Package Type | RGC | RGC | RGC |
| Industry STD Term | VQFN | VQFN | VQFN |
| JEDEC Code | S-PQFP-N | S-PQFP-N | S-PQFP-N |
| Package QTY | 25 | 2000 | 250 |
| Carrier | SMALL T&R | LARGE T&R | SMALL T&R |
| Device Marking | AZ42B49I | AZ42B49I | AZ42B49I |
| Width (mm) | 9 | 9 | 9 |
| Length (mm) | 9 | 9 | 9 |
| Thickness (mm) | .88 | .88 | .88 |
| Pitch (mm) | .5 | .5 | .5 |
| Max Height (mm) | 1 | 1 | 1 |
| Mechanical Data | 下载 | 下载 | 下载 |
参数化
| Parameters / Models | ADS42B49IRGC25 | ADS42B49IRGCR | ADS42B49IRGCT |
|---|---|---|---|
| # Input Channels | 2 | 2 | 2 |
| Analog Input BW, MHz | 600 | 600 | 600 |
| Architecture | Pipeline | Pipeline | Pipeline |
| DNL(Max), +/-LSB | 0.5 | 0.5 | 0.5 |
| DNL(Typ), +/-LSB | 0.5 | 0.5 | 0.5 |
| ENOB, Bits | 11.45 | 11.45 | 11.45 |
| INL(Max), +/-LSB | 2 | 2 | 2 |
| INL(Typ), +/-LSB | 2 | 2 | 2 |
| Input Buffer | Yes | Yes | Yes |
| Input Range, Vp-p | 1.9 | 1.9 | 1.9 |
| Interface | DDR LVDS,Parallel CMOS | DDR LVDS,Parallel CMOS | DDR LVDS,Parallel CMOS |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 |
| Package Group | VQFN | VQFN | VQFN |
| Package Size: mm2:W x L, PKG | 64VQFN: 81 mm2: 9 x 9(VQFN) | 64VQFN: 81 mm2: 9 x 9(VQFN) | 64VQFN: 81 mm2: 9 x 9(VQFN) |
| Power Consumption(Typ), mW | 840 | 840 | 840 |
| Rating | Catalog | Catalog | Catalog |
| Reference Mode | Int | Int | Int |
| Resolution, Bits | 14 | 14 | 14 |
| SFDR, dB | 85 | 85 | 85 |
| SINAD, dB | 70.7 | 70.7 | 70.7 |
| SNR, dB | 71.1 | 71.1 | 71.1 |
| Sample Rate(Max), MSPS | 250 | 250 | 250 |
生态计划
| ADS42B49IRGC25 | ADS42B49IRGCR | ADS42B49IRGCT | |
|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant |
应用须知
- Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)PDF, 1.2 Mb, 修订版: A, 档案已发布: Jul 19, 2013
- Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)PDF, 2.0 Mb, 修订版: A, 档案已发布: May 22, 2015
- Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
- A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference. - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015
模型线
系列: ADS42B49 (3)
制造商分类
- Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)