Datasheet Texas Instruments ADS5277 — 数据表

制造商	Texas Instruments
系列	ADS5277

数据表

价格

状态

打包

参数化

Parameters / Models	ADS5277IPFP	ADS5277IPFPG4	ADS5277IPFPT
# Input Channels	8	8	8
Analog Input BW, MHz	300		300
Analog Input BW(MHz)		300
Approx. Price (US$)		55.18 | 100u
Architecture	Pipeline	Pipeline	Pipeline
DNL(Max), +/-LSB	0.08		0.08
DNL(Max)(+/-LSB)		0.08
DNL(Typ), +/-LSB	0.08		0.08
ENOB, Bits	9.7		9.7
ENOB(Bits)		9.7
INL(Max), +/-LSB	0.09		0.09
INL(Max)(+/-LSB)		0.09
INL(Typ), +/-LSB	0.09		0.09
Input Buffer	No		No
Input Range, Vp-p	2	2V (p-p)	2
Interface	Parallel LVDS	Parallel LVDS	Parallel LVDS
Operating Temperature Range, C	-40 to 85		-40 to 85
Operating Temperature Range(C)		-40 to 85
Package Group	HTQFP	HTQFP	HTQFP
Package Size(mm2=WxL)		80HTQFP: 196 mm2: 14 x 14
Package Size: mm2:W x L, PKG	80HTQFP: 196 mm2: 14 x 14(HTQFP)		80HTQFP: 196 mm2: 14 x 14(HTQFP)
Power Consumption(Typ), mW	845		845
Power Consumption(Typ)(mW)		845
Rating	Catalog	Catalog	Catalog
Reference Mode	Ext,Int	Ext Int	Ext,Int
Resolution, Bits	10		10
Resolution(Bits)		10
SFDR, dB	85		85
SFDR(dB)		85
SINAD, dB	61.7		61.7
SINAD(dB)		61.7
SNR, dB	61.7		61.7
SNR(dB)		61.7
Sample Rate (max)(SPS)		65MSPS
Sample Rate(Max), MSPS	65		65

生态计划

应用须知

• 下载
  Using the ADSDeSer-50EVM to Deserialize ADS527x 10-Bit Outputs
  PDF, 104 Kb, 档案已发布: Jul 8, 2004
  The ADSDeSer-50EVM provides an direct means of examining the serialized 10-bit data output from the ADS527x families of serialized low voltage differential signal(LVDS) data converters by deserializing the data and converting to a parallel data port. This application report discusses the process of reading deserialized 10-bit data outputs from the ADS527x family using the ADSDeSer50-EVM.
• 下载
  LVDS Outputs on the ADS527x
  PDF, 236 Kb, 档案已发布: Jun 10, 2004
• 下载
  Interfacing High-Speed LVDS Outputs of the ADS527x/ADS524x
  PDF, 67 Kb, 档案已发布: Feb 23, 2005
  The ADS527x and ADS524x families of devices are high-performance octal/quad channel analog-to-digital converters, ideal for the highest system density. Serial low voltage differential signaling (LVDS) outputs reduce the number of I/O interfaces required, power and overall package size. These device families are rated to work from sampling rates of 20MSPS to 70MSPS, corresponding to data rates of 2
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  Interfacing the VCA8617 with High-Speed ADCs
  PDF, 72 Kb, 档案已发布: Apr 5, 2005
  The VCA8617 is an 8-channel variable gain amplifier ideally suited for portable and mid-range ultrasound applications. Each channel consists of a Low Noise Amplifier (LNA) and a Variable Gain Amplifier (VGA). The VGA contains two parts: a voltage-controlled attenuator and a programmable gain amplifier. The PGA output feeds directly into an integrated 3-pole low-pass Butterworth filter, which preve
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  CDCE62005 as Clock Solution for High-Speed ADCs
  PDF, 805 Kb, 档案已发布: Sep 4, 2008
  TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements
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  Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)
  PDF, 1.2 Mb, 修订版: A, 档案已发布: Jul 19, 2013
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  Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)
  PDF, 2.0 Mb, 修订版: A, 档案已发布: May 22, 2015
• 下载
  Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
  PDF, 376 Kb, 档案已发布: Apr 28, 2009
  This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.
• 下载
  Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
  PDF, 327 Kb, 修订版: A, 档案已发布: Sep 10, 2010
  This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
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  Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
  PDF, 2.3 Mb, 档案已发布: Jun 2, 2008
  This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
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  CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
  PDF, 424 Kb, 档案已发布: Jun 8, 2008
  Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
• 下载
  Principles of Data Acquisition and Conversion (Rev. A)
  PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015
• 下载
  A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
  PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
  This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
• 下载
  Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
  PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
• 下载
  LVDS Outputs on the ADS527x
  PDF, 236 Kb, 档案已发布: Jun 10, 2004
• 下载
  Interfacing the VCA8613 with High-Speed ADCs
  PDF, 78 Kb, 档案已发布: Apr 5, 2005
  The VCA8613 is an 8-channel variable gain amplifier ideally suited for portable and mid-range ultrasound applications. Each channel consists of a Low Noise Amplifier (LNA) and a Variable Gain Amplifie
• 下载
  Interfacing High-Speed LVDS Outputs of the ADS527x/ADS524x
  PDF, 67 Kb, 档案已发布: Feb 23, 2005
  The ADS527x and ADS524x families of devices are high-performance octal/quad channel analog-to-digital converters, ideal for the highest system density. Serial low voltage differential signaling (LVDS)
• 下载
  Interfacing the VCA8617 with High-Speed ADCs
  PDF, 72 Kb, 档案已发布: Apr 5, 2005
  The VCA8617 is an 8-channel variable gain amplifier ideally suited for portable and mid-range ultrasound applications. Each channel consists of a Low Noise Amplifier (LNA) and a Variable Gain Amplifie
• 下载
  Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)
  PDF, 1.2 Mb, 修订版: A, 档案已发布: Jul 19, 2013
  ADS4149 Why Use Oversampling when Undersampling Can Do the Job?
• 下载
  Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)
  PDF, 2.0 Mb, 修订版: A, 档案已发布: May 22, 2015
  ADS6129, ADS6149 Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat
• 下载
  CDCE62005 as Clock Solution for High-Speed ADCs
  PDF, 805 Kb, 档案已发布: Sep 4, 2008
  TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527, which is capable of sampling up to 210 MSPS. To realize the full potential of thes
• 下载
  Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
  PDF, 376 Kb, 档案已发布: Apr 28, 2009
  This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs
• 下载
  Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
  PDF, 327 Kb, 修订版: A, 档案已发布: Sep 10, 2010
  This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies
• 下载
  Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
  PDF, 2.3 Mb, 档案已发布: Jun 2, 2008
  This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the refe
• 下载
  CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
  PDF, 424 Kb, 档案已发布: Jun 8, 2008
  Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed, high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483, which is capable of
• 下载
  Principles of Data Acquisition and Conversion (Rev. A)
  PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015
  AB-082 Principles of Data Acquisition and Conversion
• 下载
  Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
  PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
  AB-084 Analog-to-Digital Grounding Practices Affect System Performance
• 下载
  Interleaving Analog-to-Digital Converters
  PDF, 64 Kb, 档案已发布: Oct 2, 2000
  It is tempting when pushing the limits of analog-to-digital conversion to consider interleaving two or more converters to increase the sample rate. However, such designs must take into consideration s
• 下载
  A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
  PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
  This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (ΔΣ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specificati
• 下载
  What Designers Should Know About Data Converter Drift
  PDF, 95 Kb, 档案已发布: Oct 2, 2000
  Exactly how inaccurate will a change in temperature make an analog-to-digital or digital-to-analog converter? As designers are well aware, a 12-bit device may provide a much lower accuracy at its oper

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• Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)