Datasheet Texas Instruments ADS5440 — 数据表

制造商	Texas Instruments
系列	ADS5440

数据表

价格

状态

打包

参数化

Parameters / Models	ADS5440IPFP	ADS5440IPFPR	ADS5440IPFPRG4
# Input Channels	1	1	1
Analog Input BW, MHz	500
Analog Input BW(MHz)		500	500
Approx. Price (US$)		59.75 | 1ku	59.75 | 1ku
Architecture	Pipeline
DNL(Max), +/-LSB	0.4
DNL(Max)(+/-LSB)		0.4	0.4
DNL(Typ), +/-LSB	0.4
ENOB, Bits	11.4
ENOB(Bits)		11.4	11.4
INL(Max), +/-LSB	0.9
INL(Max)(+/-LSB)		0.9	0.9
INL(Typ), +/-LSB	0.9
Input Buffer	Yes	Yes	Yes
Input Range	2.2	2.2V (p-p)	2.2V (p-p)
Interface	Parallel LVDS	Parallel LVDS	Parallel LVDS
Operating Temperature Range, C	-40 to 85
Operating Temperature Range(C)		-40 to 85	-40 to 85
Package Group	HTQFP	HTQFP	HTQFP
Package Size: mm2:W x L, PKG	80HTQFP: 196 mm2: 14 x 14(HTQFP)
Package Size: mm2:W x L (PKG)		80HTQFP: 196 mm2: 14 x 14(HTQFP)	80HTQFP: 196 mm2: 14 x 14(HTQFP)
Power Consumption(Typ), mW	2250
Power Consumption(Typ)(mW)		2250	2250
Rating	Catalog	Catalog	Catalog
Reference Mode	Int	Int	Int
Resolution, Bits	13
Resolution(Bits)		13	13
SFDR, dB	80
SFDR(dB)		80	80
SINAD, dB	68
SINAD(dB)		68	68
SNR, dB	69
SNR(dB)		69	69
Sample Rate(Max), MSPS	210
Sample Rate(Max)(MSPS)		210	210

生态计划

应用须知

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  The goal of this document is to introduce a wide range of theories and topics that are relevant tohigh-speed analog-to-digital converters (ADC). This document provides details on sampling theorydata-sheet specifications ADC selection criteria and evaluation methods clock jitter and other commonsystem-level concerns. In addition some end-users will want to extend the performance capabil
• 下载
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  PDF, 2.0 Mb, 修订版: A, 档案已发布: May 22, 2015
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  Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)
  PDF, 1.2 Mb, 修订版: A, 档案已发布: Jul 19, 2013
• 下载
  Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
  PDF, 376 Kb, 档案已发布: Apr 28, 2009
  This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.
• 下载
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  PDF, 327 Kb, 修订版: A, 档案已发布: Sep 10, 2010
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  PDF, 2.3 Mb, 档案已发布: Jun 2, 2008
  This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
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  PDF, 424 Kb, 档案已发布: Jun 8, 2008
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  Interleaving Analog-to-Digital Converters
  PDF, 64 Kb, 档案已发布: Oct 2, 2000
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  PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015
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  A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
  PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
  This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
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• 下载
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  PDF, 95 Kb, 档案已发布: Oct 2, 2000
  Exactly how inaccurate will a change in temperature make an analog-to-digital or digital-to-analog converter? As designers are well aware, a 12-bit device may provide a much lower accuracy at its operating-temperature extremes, perhaps only to 9 or even 8 bits. But for lack of more precise knowledge, many play it safe (and expensive) and overspecify.

模型线

制造商分类

• Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)