Datasheet Texas Instruments ADS774 — 数据表

制造商	Texas Instruments
系列	ADS774

数据表

价格

状态

打包

参数化

Parameters / Models	ADS774JP	ADS774JPG4	ADS774JU	ADS774JU/1K	ADS774JUE4	ADS774KU	ADS774KU/1K	ADS774KU/1KE4	ADS774KUE4
# Input Channels	1	1	1	1	1	1	1	1	1
Analog Voltage AV/DD(Max)(V)	5.5	5.5
Analog Voltage AV/DD(Min)(V)	4.5	4.5
Analog Voltage AVDD(Max), V			5.5	5.5	5.5	5.5	5.5	5.5	5.5
Analog Voltage AVDD(Min), V			4.5	4.5	4.5	4.5	4.5	4.5	4.5
Approx. Price (US$)	20.08 | 1ku	20.08 | 1ku
Architecture	SAR	SAR	SAR	SAR	SAR	SAR	SAR	SAR	SAR
Digital Supply(Max), V			5.5	5.5	5.5	5.5	5.5	5.5	5.5
Digital Supply(Max)(V)	5.5	5.5
Digital Supply(Min), V			4.5	4.5	4.5	4.5	4.5	4.5	4.5
Digital Supply(Min)(V)	4.5	4.5
INL(Max), +/-LSB			0.5	0.5	0.5	0.5	0.5	0.5	0.5
INL(Max)(+/-LSB)	0.5	0.5
Input Range(Max), V			10	10	10	10	10	10	10
Input Range(Max)(V)	10	10
Input Range(Min), V			-10	-10	-10	-10	-10	-10	-10
Input Range(Min)(V)	-10	-10
Input Type	Single-Ended	Single-Ended	Single-Ended	Single-Ended	Single-Ended	Single-Ended	Single-Ended	Single-Ended	Single-Ended
Integrated Features			N/A	N/A	N/A	N/A	N/A	N/A	N/A
Interface	Parallel	Parallel	Parallel	Parallel	Parallel	Parallel	Parallel	Parallel	Parallel
Multi-Channel Configuration			N/A	N/A	N/A	N/A	N/A	N/A	N/A
Operating Temperature Range, C			-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85
Operating Temperature Range(C)	-40 to 85	-40 to 85
Package Group	SOIC	SOIC	SOIC	SOIC	SOIC	SOIC	SOIC	SOIC	SOIC
Package Size(mm2=WxL)	28SOIC: 184 mm2: 10.3 x 17.9	28SOIC: 184 mm2: 10.3 x 17.9
Package Size: mm2:W x L, PKG			28SOIC: 184 mm2: 10.3 x 17.9(SOIC)	28SOIC: 184 mm2: 10.3 x 17.9(SOIC)	28SOIC: 184 mm2: 10.3 x 17.9(SOIC)	28SOIC: 184 mm2: 10.3 x 17.9(SOIC)	28SOIC: 184 mm2: 10.3 x 17.9(SOIC)	28SOIC: 184 mm2: 10.3 x 17.9(SOIC)	28SOIC: 184 mm2: 10.3 x 17.9(SOIC)
Power Consumption(Typ), mW			75	75	75	75	75	75	75
Power Consumption(Typ)(mW)	75	75
Rating	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog
Reference Mode	Ext Int	Ext Int	Ext,Int	Ext,Int	Ext,Int	Ext,Int	Ext,Int	Ext,Int	Ext,Int
Resolution, Bits			12	12	12	12	12	12	12
Resolution(Bits)	12	12
SINAD, dB			N/A	N/A	N/A	N/A	N/A	N/A	N/A
SINAD(dB)	71	71
SNR, dB			72	72	72	72	72	72	72
SNR(dB)	72	72
Sample Rate (max), SPS			117kSPS	117kSPS	117kSPS	117kSPS	117kSPS	117kSPS	117kSPS
Sample Rate (max)(SPS)	125kSPS	125kSPS
Sample Rate(Max), MSPS			0.117	0.117	0.117	0.117	0.117	0.117	0.117
THD(Typ), dB			-77	-77	-77	-77	-77	-77	-77
THD(Typ)(dB)	-77	-77

生态计划

应用须知

• 下载
  CDAC Architecture Gives ADC574 Pinout /Sampling, Low Power, New Input Ranges
  PDF, 54 Kb, 档案已发布: Sep 27, 2000
  This application note compares basic current-mode successive approximation A/Ds with CDAC-based architectures, and shows how adding a resistor divider network to the CDAC input permits the Burr-Brown ADS574 and ADS774 to fit existing ADC574 sockets. It then goes on to descibe some new analog input voltage ranges available on these parts due to the resistor network and CDAC approach.
• 下载
  Complete Temp Data Acquisition System From a Single +5V Supply
  PDF, 68 Kb, 档案已发布: Oct 2, 2000
  The CMOS ADS574 and ADS774 are drop-in replacements for industry standard ADC574 analog-to-digital converter, offering lower power and the capability to operate from a single +5V supply. The switched capacitor array architecture (CDAC), with the input resistor divider network to provide ADC574 input ranges, also allow the new parts to handle additional input ranges, including a 0V to 5V range. Thi
• 下载
  Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
  PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
  This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
• 下载
  Determining Minimum Acquisition Times for SAR ADCs, part 2
  PDF, 215 Kb, 档案已发布: Mar 17, 2011
  The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
• 下载
  Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
  PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
• 下载
  A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
  PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
  This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
• 下载
  Principles of Data Acquisition and Conversion (Rev. A)
  PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015
• 下载
  CDAC Architecture Gives ADC574 Pinout /Sampling, Low Power, New Input Ranges
  PDF, 54 Kb, 档案已发布: Sep 27, 2000
  This application note compares basic current-mode successive approximation A/Ds with CDAC-based architectures, and shows how adding a resistor divider network to the CDAC input permits the Burr-Brown
• 下载
  Complete Temp Data Acquisition System From a Single +5V Supply
  PDF, 68 Kb, 档案已发布: Oct 2, 2000
  The CMOS ADS574 and ADS774 are drop-in replacements for industry standard ADC574 analog-to-digital converter, offering lower power and the capability to operate from a single +5V supply. The switched
• 下载
  Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
  PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
  This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC
• 下载
  Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
  PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
  AB-084 Analog-to-Digital Grounding Practices Affect System Performance
• 下载
  A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
  PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
  This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (ΔΣ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specificati
• 下载
  Interleaving Analog-to-Digital Converters
  PDF, 64 Kb, 档案已发布: Oct 2, 2000
  It is tempting when pushing the limits of analog-to-digital conversion to consider interleaving two or more converters to increase the sample rate. However, such designs must take into consideration s
• 下载
  Principles of Data Acquisition and Conversion (Rev. A)
  PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015
  AB-082 Principles of Data Acquisition and Conversion
• 下载
  What Designers Should Know About Data Converter Drift
  PDF, 95 Kb, 档案已发布: Oct 2, 2000
  Exactly how inaccurate will a change in temperature make an analog-to-digital or digital-to-analog converter? As designers are well aware, a 12-bit device may provide a much lower accuracy at its oper

模型线

制造商分类

• Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)