Datasheet Texas Instruments ADS7841-Q1 — 数据表

制造商Texas Instruments
系列ADS7841-Q1
Datasheet Texas Instruments ADS7841-Q1

汽车类12位4通道串行输出采样模数转换器

数据表

12-Bit 4-Channel Serial-Output Sampling Analog-to-Digital Converter.. datasheet
PDF, 1.3 Mb, 修订版: C, 档案已发布: Oct 28, 2012
从文件中提取

价格

状态

ADS7841EIDBQRQ1ADS7841ESQDBQRQ1
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesYes

打包

ADS7841EIDBQRQ1ADS7841ESQDBQRQ1
N12
Pin1616
Package TypeDBQDBQ
Industry STD TermSSOPSSOP
JEDEC CodeR-PDSO-GR-PDSO-G
Package QTY25002500
CarrierLARGE T&RLARGE T&R
Device MarkingS7841ES7841S
Width (mm)3.93.9
Length (mm)4.94.9
Thickness (mm)1.51.5
Pitch (mm).64.64
Max Height (mm)1.751.75
Mechanical Data下载下载

参数化

Parameters / ModelsADS7841EIDBQRQ1
ADS7841EIDBQRQ1
ADS7841ESQDBQRQ1
ADS7841ESQDBQRQ1
# Input Channels44
Analog Voltage AVDD(Max), V5.255.25
Analog Voltage AVDD(Min), V2.72.7
ArchitectureSARSAR
Digital Supply(Max), V5.255.25
Digital Supply(Min), V2.72.7
INL(Max), +/-LSB11
Input Range(Max), V5.255.25
Input TypeSingle-EndedSingle-Ended
Integrated FeaturesN/AN/A
InterfaceSerialSerial
Multi-Channel ConfigurationMultiplexedMultiplexed
Operating Temperature Range, C-40 to 125-40 to 125
Package GroupSSOPSSOP
Package Size: mm2:W x L, PKG16SSOP: 19 mm2: 3.9 x 4.9(SSOP)16SSOP: 19 mm2: 3.9 x 4.9(SSOP)
Power Consumption(Typ), mW0.840.84
RatingAutomotiveAutomotive
Reference ModeExtExt
Resolution, Bits1212
SINAD, dB7171
SNR, dB7373
Sample Rate (max), SPS200kSPS200kSPS
Sample Rate(Max), MSPS0.20.2
THD(Typ), dB-78-78

生态计划

ADS7841EIDBQRQ1ADS7841ESQDBQRQ1
RoHSCompliantCompliant

应用须知

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, 档案已发布: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015

模型线

系列: ADS7841-Q1 (2)

制造商分类

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)