Datasheet Texas Instruments ADS7870 — 数据表

制造商Texas Instruments
系列ADS7870
Datasheet Texas Instruments ADS7870

12位ADC,MUX,PGA和内部参考数据采集系统

数据表

12-Bit ADC, MUX, PGA and Internal Reference Data Acquisition System datasheet
PDF, 885 Kb, 修订版: C, 档案已发布: Dec 19, 2005
从文件中提取

价格

状态

ADS7870EAADS7870EA/1KADS7870EA/1KG4ADS7870EAG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNo

打包

ADS7870EAADS7870EA/1KADS7870EA/1KG4ADS7870EAG4
N1234
Pin28282828
Package TypeDBDBDBDB
Industry STD TermSSOPSSOPSSOPSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY501000100050
CarrierTUBELARGE T&RLARGE T&RTUBE
Device MarkingADS7870EAADS7870EAADS7870EAADS7870EA
Width (mm)5.35.35.35.3
Length (mm)10.210.210.210.2
Thickness (mm)1.951.951.951.95
Pitch (mm).65.65.65.65
Max Height (mm)2222
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参数化

Parameters / ModelsADS7870EA
ADS7870EA
ADS7870EA/1K
ADS7870EA/1K
ADS7870EA/1KG4
ADS7870EA/1KG4
ADS7870EAG4
ADS7870EAG4
# Input Channels8888
Analog Voltage AVDD(Max), V5.55.55.55.5
Analog Voltage AVDD(Min), V2.72.72.72.7
ArchitectureSARSARSARSAR
Digital Supply(Max), V5.55.55.55.5
Digital Supply(Min), V2.72.72.72.7
INL(Max), +/-LSB2.52.52.52.5
Input Range(Max), V5.55.55.55.5
Input TypeDifferential,Single-EndedDifferential,Single-EndedDifferential,Single-EndedDifferential,Single-Ended
Integrated FeaturesOscillator,PGAOscillator,PGAOscillator,PGAOscillator,PGA
InterfaceSPISPISPISPI
Multi-Channel ConfigurationMultiplexedMultiplexedMultiplexedMultiplexed
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85
Package GroupSSOPSSOPSSOPSSOP
Package Size: mm2:W x L, PKG28SSOP: 80 mm2: 7.8 x 10.2(SSOP)28SSOP: 80 mm2: 7.8 x 10.2(SSOP)28SSOP: 80 mm2: 7.8 x 10.2(SSOP)28SSOP: 80 mm2: 7.8 x 10.2(SSOP)
Power Consumption(Typ), mW6666
RatingCatalogCatalogCatalogCatalog
Reference ModeExt,IntExt,IntExt,IntExt,Int
Resolution, Bits12121212
SINAD, dBN/AN/AN/AN/A
Sample Rate (max), SPS52kSPS52kSPS52kSPS52kSPS
Sample Rate(Max), MSPS0.0520.0520.0520.052
THD(Typ), dBN/AN/AN/AN/A

生态计划

ADS7870EAADS7870EA/1KADS7870EA/1KG4ADS7870EAG4
RoHSCompliantCompliantCompliantCompliant

应用须知

  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
  • AB-174: Getting the Full Potential from your ADC (Rev. A)
    PDF, 72 Kb, 修订版: A, 档案已发布: Jun 28, 2002
    Many of today?s high-resolution ADCs (Analog-to-Digital Converters) are operating from a single supply and use fully differential inputs. This can be a problem for single-ended signals that are bipolar relative to common. This article illustrates circuit configurations that preserve the full-scale input range by using modern features, such as Programmable Gain Amplifiers (PGAs) and internal voltag
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Interfacing the ADS7870 and the MC68HC11E9 Analog to Microcomputer Made Easy
    PDF, 82 Kb, 档案已发布: Sep 27, 2000
    Assembly of a data-acquisition system with its many parts (multiplexed, amplifiers, ADC, voltage reference, etc.) can be complex and expensive. The new Burr-Brown ADS7870 solves the problem with its 12-bit low-power CMOS data acquisition system containing all parts mentioned, and extras. The space saving system is in a samll (SSOP-28 surface-mount) plastic package.
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, 档案已发布: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

模型线

制造商分类

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)