Datasheet Texas Instruments ADS7950 — 数据表

制造商Texas Instruments
系列ADS7950
Datasheet Texas Instruments ADS7950

12位,1 MSPS,4通道,单端,微功耗,sr i / f,SAR ADC

数据表

ADS79xx 12/10/8-Bit, 1 MSPS, 16/12/8/4-Channel, Single-Ended, MicroPower, Serial Interface ADCs datasheet
PDF, 1.9 Mb, 修订版: B, 档案已发布: Jul 31, 2015
从文件中提取

价格

状态

ADS7950SBDBTADS7950SBDBTG4ADS7950SBDBTRADS7950SBRGERADS7950SBRGETADS7950SDBTADS7950SDBTG4ADS7950SDBTRADS7950SDBTRG4ADS7950SRGERADS7950SRGET
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoYesNoYesNoYesYesNoNoYesYes

打包

ADS7950SBDBTADS7950SBDBTG4ADS7950SBDBTRADS7950SBRGERADS7950SBRGETADS7950SDBTADS7950SDBTG4ADS7950SDBTRADS7950SDBTRG4ADS7950SRGERADS7950SRGET
N1234567891011
Pin3030302424303030302424
Package TypeDBTDBTDBTRGERGEDBTDBTDBTDBTRGERGE
Industry STD TermTSSOPTSSOPTSSOPVQFNVQFNTSSOPTSSOPTSSOPTSSOPVQFNVQFN
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GS-PQFP-NS-PQFP-NR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GS-PQFP-NS-PQFP-N
Package QTY6060200030002506060200020003000250
CarrierTUBETUBELARGE T&RLARGE T&RSMALL T&RTUBETUBELARGE T&RLARGE T&RLARGE T&RSMALL T&R
Device MarkingBADS7950ADS7950B7950ADS7950ADS7950ADS7950ADS795079507950
Width (mm)4.44.44.4444.44.44.44.444
Length (mm)7.87.87.8447.87.87.87.844
Thickness (mm)111.88.881111.88.88
Pitch (mm).5.5.5.5.5.5.5.5.5.5.5
Max Height (mm)1.21.21.2111.21.21.21.211
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参数化

Parameters / ModelsADS7950SBDBT
ADS7950SBDBT
ADS7950SBDBTG4
ADS7950SBDBTG4
ADS7950SBDBTR
ADS7950SBDBTR
ADS7950SBRGER
ADS7950SBRGER
ADS7950SBRGET
ADS7950SBRGET
ADS7950SDBT
ADS7950SDBT
ADS7950SDBTG4
ADS7950SDBTG4
ADS7950SDBTR
ADS7950SDBTR
ADS7950SDBTRG4
ADS7950SDBTRG4
ADS7950SRGER
ADS7950SRGER
ADS7950SRGET
ADS7950SRGET
# Input Channels44444444444
Analog Voltage AVDD(Max), V5.255.255.255.255.255.255.255.255.255.255.25
Analog Voltage AVDD(Min), V2.72.72.72.72.72.72.72.72.72.72.7
ArchitectureSARSARSARSARSARSARSARSARSARSARSAR
Digital Supply(Max), V5.255.255.255.255.255.255.255.255.255.255.25
Digital Supply(Min), V1.71.71.71.71.71.71.71.71.71.71.7
INL(Max), +/-LSB11111111111
Input Range(Max), V5.255.255.255.255.255.255.255.255.255.255.25
Input TypeSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-Ended
Integrated FeaturesN/AN/AN/AN/AN/AN/AN/AN/AN/AN/AN/A
InterfaceSPISPISPISPISPISPISPISPISPISPISPI
Multi-Channel ConfigurationMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexed
Operating Temperature Range, C-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125
Package GroupTSSOPTSSOPTSSOPVQFNVQFNTSSOPTSSOPTSSOPTSSOPVQFNVQFN
Package Size: mm2:W x L, PKG30TSSOP: 50 mm2: 6.4 x 7.8(TSSOP)30TSSOP: 50 mm2: 6.4 x 7.8(TSSOP)30TSSOP: 50 mm2: 6.4 x 7.8(TSSOP)24VQFN: 16 mm2: 4 x 4(VQFN)24VQFN: 16 mm2: 4 x 4(VQFN)30TSSOP: 50 mm2: 6.4 x 7.8(TSSOP)30TSSOP: 50 mm2: 6.4 x 7.8(TSSOP)30TSSOP: 50 mm2: 6.4 x 7.8(TSSOP)30TSSOP: 50 mm2: 6.4 x 7.8(TSSOP)24VQFN: 16 mm2: 4 x 4(VQFN)24VQFN: 16 mm2: 4 x 4(VQFN)
Power Consumption(Typ), mW11.511.511.511.511.511.511.511.511.511.511.5
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Reference ModeExtExtExtExtExtExtExtExtExtExtExt
Resolution, Bits1212121212121212121212
SINAD, dB71.371.371.371.371.371.371.371.371.371.371.3
SNR, dB71.771.771.771.771.771.771.771.771.771.771.7
Sample Rate (max), SPS1MSPS1MSPS1MSPS1MSPS1MSPS1MSPS1MSPS1MSPS1MSPS1MSPS1MSPS
Sample Rate(Max), MSPS11111111111
THD(Typ), dB-82-82-82-82-82-82-82-82-82-82-82

生态计划

ADS7950SBDBTADS7950SBDBTG4ADS7950SBDBTRADS7950SBRGERADS7950SBRGETADS7950SDBTADS7950SDBTG4ADS7950SDBTRADS7950SDBTRG4ADS7950SRGERADS7950SRGET
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant

应用须知

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, 档案已发布: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015

模型线

制造商分类

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)