Datasheet Texas Instruments ADS7952 — 数据表

制造商Texas Instruments
系列ADS7952
Datasheet Texas Instruments ADS7952

12位,1 MSPS,12通道,单端,微功耗,sr i / f,SAR ADC

数据表

ADS79xx 12/10/8-Bit, 1 MSPS, 16/12/8/4-Channel, Single-Ended, MicroPower, Serial Interface ADCs datasheet
PDF, 1.9 Mb, 修订版: B, 档案已发布: Jul 31, 2015
从文件中提取

价格

状态

ADS7952SBDBTADS7952SBDBTG4ADS7952SBDBTRADS7952SBRHBRADS7952SBRHBTADS7952SDBTADS7952SDBTG4ADS7952SDBTRADS7952SRHBRADS7952SRHBT
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoYesYesNoNoNo

打包

ADS7952SBDBTADS7952SBDBTG4ADS7952SBDBTRADS7952SBRHBRADS7952SBRHBTADS7952SDBTADS7952SDBTG4ADS7952SDBTRADS7952SRHBRADS7952SRHBT
N12345678910
Pin38383832323838383232
Package TypeDBTDBTDBTRHBRHBDBTDBTDBTRHBRHB
Industry STD TermTSSOPTSSOPTSSOPVQFNVQFNTSSOPTSSOPTSSOPVQFNVQFN
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GS-PQFP-NS-PQFP-NR-PDSO-GR-PDSO-GR-PDSO-GS-PQFP-NS-PQFP-N
Package QTY505020003000250505020003000250
CarrierTUBETUBELARGE T&RLARGE T&RSMALL T&RTUBETUBELARGE T&RLARGE T&RSMALL T&R
Device MarkingBADS7952ADS7952ADSADSADS7952ADS7952ADS795279527952
Width (mm)4.44.44.4554.44.44.455
Length (mm)9.79.79.7559.79.79.755
Thickness (mm)111.9.9111.9.9
Pitch (mm).5.5.5.5.5.5.5.5.5.5
Max Height (mm)1.21.21.2111.21.21.211
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参数化

Parameters / ModelsADS7952SBDBT
ADS7952SBDBT
ADS7952SBDBTG4
ADS7952SBDBTG4
ADS7952SBDBTR
ADS7952SBDBTR
ADS7952SBRHBR
ADS7952SBRHBR
ADS7952SBRHBT
ADS7952SBRHBT
ADS7952SDBT
ADS7952SDBT
ADS7952SDBTG4
ADS7952SDBTG4
ADS7952SDBTR
ADS7952SDBTR
ADS7952SRHBR
ADS7952SRHBR
ADS7952SRHBT
ADS7952SRHBT
# Input Channels12121212121212121212
Analog Voltage AVDD(Max), V5.255.255.255.255.255.255.255.255.255.25
Analog Voltage AVDD(Min), V2.72.72.72.72.72.72.72.72.72.7
ArchitectureSARSARSARSARSARSARSARSARSARSAR
Digital Supply(Max), V5.255.255.255.255.255.255.255.255.255.25
Digital Supply(Min), V1.71.71.71.71.71.71.71.71.71.7
INL(Max), +/-LSB1111111111
Input Range(Max), V5.255.255.255.255.255.255.255.255.255.25
Input TypeSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-Ended
Integrated FeaturesN/AN/AN/AN/AN/AN/AN/AN/AN/AN/A
InterfaceSPISPISPISPISPISPISPISPISPISPI
Multi-Channel ConfigurationMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexed
Operating Temperature Range, C-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125
Package GroupTSSOPTSSOPTSSOPVQFNVQFNTSSOPTSSOPTSSOPVQFNVQFN
Package Size: mm2:W x L, PKG38TSSOP: 62 mm2: 6.4 x 9.7(TSSOP)38TSSOP: 62 mm2: 6.4 x 9.7(TSSOP)38TSSOP: 62 mm2: 6.4 x 9.7(TSSOP)32VQFN: 25 mm2: 5 x 5(VQFN)32VQFN: 25 mm2: 5 x 5(VQFN)38TSSOP: 62 mm2: 6.4 x 9.7(TSSOP)38TSSOP: 62 mm2: 6.4 x 9.7(TSSOP)38TSSOP: 62 mm2: 6.4 x 9.7(TSSOP)32VQFN: 25 mm2: 5 x 5(VQFN)32VQFN: 25 mm2: 5 x 5(VQFN)
Power Consumption(Typ), mW11.511.511.511.511.511.511.511.511.511.5
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Reference ModeExtExtExtExtExtExtExtExtExtExt
Resolution, Bits12121212121212121212
SINAD, dB71.371.371.371.371.371.371.371.371.371.3
SNR, dB71.771.771.771.771.771.771.771.771.771.7
Sample Rate (max), SPS1MSPS1MSPS1MSPS1MSPS1MSPS1MSPS1MSPS1MSPS1MSPS1MSPS
Sample Rate(Max), MSPS1111111111
THD(Typ), dB-82-82-82-82-82-82-82-82-82-82

生态计划

ADS7952SBDBTADS7952SBDBTG4ADS7952SBDBTRADS7952SBRHBRADS7952SBRHBTADS7952SDBTADS7952SDBTG4ADS7952SDBTRADS7952SRHBRADS7952SRHBT
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant

应用须知

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, 档案已发布: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015

模型线

制造商分类

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)