Datasheet Texas Instruments ADS8319 — 数据表

制造商Texas Instruments
系列ADS8319
Datasheet Texas Instruments ADS8319

MSOP-10中具有SPI接口的精密16位SAR

数据表

ADS8319 16-Bit, 500-kSPS, Serial Interface, Micropower, Miniature, SAR Analog-to-Digital Converter datasheet
PDF, 2.3 Mb, 修订版: C, 档案已发布: Dec 9, 2016
从文件中提取

价格

状态

ADS8319IBDGSRADS8319IBDGSTADS8319IBDRCRADS8319IBDRCTADS8319IDGSRADS8319IDGSTADS8319IDRCT
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoYesYesNoNoYesNo

打包

ADS8319IBDGSRADS8319IBDGSTADS8319IBDRCRADS8319IBDRCTADS8319IDGSRADS8319IDGSTADS8319IDRCT
N1234567
Pin10101010101010
Package TypeDGSDGSDRCDRCDGSDGSDRC
Industry STD TermVSSOPVSSOPVSONVSONVSSOPVSSOPVSON
JEDEC CodeS-PDSO-GS-PDSO-GS-PDSO-NS-PDSO-NS-PDSO-GS-PDSO-GS-PDSO-N
Package QTY250025030002502500250250
CarrierLARGE T&RSMALL T&RLARGE T&RSMALL T&RLARGE T&RSMALL T&RSMALL T&R
Device MarkingCENCENCEPCEPCENCENCEP
Width (mm)3333333
Length (mm)3333333
Thickness (mm)1.021.02.9.91.021.02.9
Pitch (mm).5.5.5.5.5.5.5
Max Height (mm)1.071.07111.071.071
Mechanical Data下载下载下载下载下载下载下载

参数化

Parameters / ModelsADS8319IBDGSR
ADS8319IBDGSR
ADS8319IBDGST
ADS8319IBDGST
ADS8319IBDRCR
ADS8319IBDRCR
ADS8319IBDRCT
ADS8319IBDRCT
ADS8319IDGSR
ADS8319IDGSR
ADS8319IDGST
ADS8319IDGST
ADS8319IDRCT
ADS8319IDRCT
# Input Channels1111111
Analog Voltage AVDD(Max), V5.55.55.55.55.55.55.5
Analog Voltage AVDD(Min), V4.54.54.54.54.54.54.5
ArchitectureSARSARSARSARSARSARSAR
Digital Supply(Max), V5.55.55.55.55.55.55.5
Digital Supply(Min), V2.3752.3752.3752.3752.3752.3752.375
INL(Max), +/-LSB1.51.51.51.51.51.51.5
Input Range(Max), V5.55.55.55.55.55.55.5
Input TypePseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-Ended
Integrated FeaturesDaisy-ChainableDaisy-ChainableDaisy-ChainableDaisy-ChainableDaisy-ChainableDaisy-ChainableDaisy-Chainable
InterfaceSPISPISPISPISPISPISPI
Multi-Channel ConfigurationN/AN/AN/AN/AN/AN/AN/A
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Package GroupVSSOPVSSOPVSONVSONVSSOPVSSOPVSON
Package Size: mm2:W x L, PKG10VSSOP: 15 mm2: 4.9 x 3(VSSOP)10VSSOP: 15 mm2: 4.9 x 3(VSSOP)10VSON: 9 mm2: 3 x 3(VSON)10VSON: 9 mm2: 3 x 3(VSON)10VSSOP: 15 mm2: 4.9 x 3(VSSOP)10VSSOP: 15 mm2: 4.9 x 3(VSSOP)10VSON: 9 mm2: 3 x 3(VSON)
Power Consumption(Typ), mW18181818181818
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Reference ModeExtExtExtExtExtExtExt
Resolution, Bits16161616161616
SINAD, dB93.893.893.893.893.893.893.8
SNR, dB93.993.993.993.993.993.993.9
Sample Rate (max), SPS500kSPS500kSPS500kSPS500kSPS500kSPS500kSPS500kSPS
Sample Rate(Max), MSPS0.50.50.50.50.50.50.5
THD(Typ), dB-111-111-111-111-111-111-111

生态计划

ADS8319IBDGSRADS8319IBDGSTADS8319IBDRCRADS8319IBDRCTADS8319IDGSRADS8319IDGSTADS8319IDRCT
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliant

应用须知

  • The IBIS model, Part 2: Determining the total quality of an IBIS model
    PDF, 221 Kb, 档案已发布: Mar 14, 2011
  • Low Power Input and Reference Driver Circuit for ADS8318 and ADS8319
    PDF, 1.5 Mb, 档案已发布: Jun 24, 2009
    The one size fits all approach to operational amplifiers is not effective. Every application has its own specific requirements that must be fulfilled. Appropriate selection of the op amp that drives an analog-to-digital converter (ADC) in a low-power application is a critical step. Most available low-power op amps trade off low-power features with other parameters such as bandwidth, settling t
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, 档案已发布: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015

模型线

制造商分类

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)