Datasheet Texas Instruments ADS8343 — 数据表

制造商Texas Instruments
系列ADS8343
Datasheet Texas Instruments ADS8343

16位,4通道串行输出采样模数转换器

数据表

ADS8343: 16-Bit, 4-Channel Serial Output Sampling Analog-to-Digital Converter datasheet
PDF, 1.2 Mb, 修订版: C, 档案已发布: Apr 15, 2003
从文件中提取

价格

状态

ADS8343EADS8343E/2K5ADS8343EBADS8343EBG4ADS8343EG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNo

打包

ADS8343EADS8343E/2K5ADS8343EBADS8343EBG4ADS8343EG4
N12345
Pin1616161616
Package TypeDBQDBQDBQDBQDBQ
Industry STD TermSSOPSSOPSSOPSSOPSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY7525007575
CarrierTUBELARGE T&RTUBETUBE
Device Marking8343E8343EADSADS
Width (mm)3.93.93.93.93.9
Length (mm)4.94.94.94.94.9
Thickness (mm)1.51.51.51.51.5
Pitch (mm).64.64.64.64.64
Max Height (mm)1.751.751.751.751.75
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参数化

Parameters / ModelsADS8343E
ADS8343E
ADS8343E/2K5
ADS8343E/2K5
ADS8343EB
ADS8343EB
ADS8343EBG4
ADS8343EBG4
ADS8343EG4
ADS8343EG4
# Input Channels44444
Analog Voltage AVDD(Max), V5.255.255.255.25
Analog Voltage AVDD(Max)(V)5.25
Analog Voltage AVDD(Min), V2.72.72.72.7
Analog Voltage AVDD(Min)(V)2.7
Approx. Price (US$)7.82 | 1ku
ArchitectureSARSARSARSARSAR
Digital Supply(Max), V5.255.255.255.25
Digital Supply(Max)(V)5.25
Digital Supply(Min), V2.72.72.72.7
Digital Supply(Min)(V)2.7
INL(Max), +/-LSB6666
INL(Max)(+/-LSB)6
Input Range(Max), V5.255.255.255.25
Input Range(Max)(V)5.25
Input TypeDifferential,Single-EndedDifferential,Single-EndedDifferential,Single-EndedDifferential,Single-EndedDifferential
Single-Ended
Integrated FeaturesN/AN/AN/AN/AN/A
InterfaceSerialSerialSerialSerialSerial
Multi-Channel ConfigurationMultiplexedMultiplexedMultiplexedMultiplexedMultiplexed
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85
Operating Temperature Range(C)-40 to 85
Package GroupSSOPSSOPSSOPSSOPSSOP
Package Size: mm2:W x L, PKG16SSOP: 19 mm2: 3.9 x 4.9(SSOP)16SSOP: 19 mm2: 3.9 x 4.9(SSOP)16SSOP: 19 mm2: 3.9 x 4.9(SSOP)16SSOP: 19 mm2: 3.9 x 4.9(SSOP)
Package Size: mm2:W x L (PKG)16SSOP: 19 mm2: 3.9 x 4.9(SSOP)
Power Consumption(Typ), mW3.23.23.23.2
Power Consumption(Typ)(mW)3.2
RatingCatalogCatalogCatalogCatalogCatalog
Reference ModeExtExtExtExtExt
Resolution, Bits16161616
Resolution(Bits)16
SINAD, dBN/AN/AN/AN/A
SINAD(dB)N/A
SNR, dB86868686
Sample Rate (max), SPS100kSPS100kSPS100kSPS100kSPS
Sample Rate (max)(SPS)100kSPS
Sample Rate(Max), MSPS0.10.10.10.1
THD(Typ), dB-95-95-95-95
THD(Typ)(dB)-95

生态计划

ADS8343EADS8343E/2K5ADS8343EBADS8343EBG4ADS8343EG4
RoHSCompliantCompliantCompliantCompliantNot Compliant
Pb FreeNo

应用须知

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different

模型线

制造商分类

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)