Datasheet Texas Instruments ADS8422 — 数据表

制造商Texas Instruments
系列ADS8422
Datasheet Texas Instruments ADS8422

带参考的16位4MSPS并行ADC,伪双极性,全差分输入

数据表

16-Bit 4MSPS Fully Differential Pseudo Bipolar Input Micro Power Sampling ADC datasheet
PDF, 1.7 Mb, 修订版: B, 档案已发布: Dec 6, 2006
从文件中提取

价格

状态

ADS8422IBPFBRADS8422IBPFBTADS8422IBPFBTG4ADS8422IPFBRADS8422IPFBRG4ADS8422IPFBT
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesYesNoNoYesNo

打包

ADS8422IBPFBRADS8422IBPFBTADS8422IBPFBTG4ADS8422IPFBRADS8422IPFBRG4ADS8422IPFBT
N123456
Pin484848484848
Package TypePFBPFBPFBPFBPFBPFB
Industry STD TermTQFPTQFPTQFPTQFPTQFPTQFP
JEDEC CodeS-PQFP-GS-PQFP-GS-PQFP-GS-PQFP-GS-PQFP-GS-PQFP-G
Package QTY100025025010001000250
CarrierLARGE T&RSMALL T&RSMALL T&RLARGE T&RLARGE T&RSMALL T&R
Device MarkingADSADSADS8422I8422IADS
Width (mm)777777
Length (mm)777777
Thickness (mm)111111
Pitch (mm).5.5.5.5.5.5
Max Height (mm)1.21.21.21.21.21.2
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参数化

Parameters / ModelsADS8422IBPFBR
ADS8422IBPFBR
ADS8422IBPFBT
ADS8422IBPFBT
ADS8422IBPFBTG4
ADS8422IBPFBTG4
ADS8422IPFBR
ADS8422IPFBR
ADS8422IPFBRG4
ADS8422IPFBRG4
ADS8422IPFBT
ADS8422IPFBT
# Input Channels111111
Analog Voltage AVDD(Max), V5.255.255.255.255.255.25
Analog Voltage AVDD(Min), V4.754.754.754.754.754.75
ArchitectureSARSARSARSARSARSAR
Digital Supply(Max), V5.255.255.255.255.255.25
Digital Supply(Min), V2.72.72.72.72.72.7
INL(Max), +/-LSB222222
Input Range(Max), V4.14.14.14.14.14.1
Input Range(Min), V4.14.14.14.14.14.1
Input TypeDifferentialDifferentialDifferentialDifferentialDifferentialDifferential
Integrated FeaturesOscillatorOscillatorOscillatorOscillatorOscillatorOscillator
InterfaceParallelParallelParallelParallelParallelParallel
Multi-Channel ConfigurationN/AN/AN/AN/AN/AN/A
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Package GroupTQFPTQFPTQFPTQFPTQFPTQFP
Package Size: mm2:W x L, PKG48TQFP: 81 mm2: 9 x 9(TQFP)48TQFP: 81 mm2: 9 x 9(TQFP)48TQFP: 81 mm2: 9 x 9(TQFP)48TQFP: 81 mm2: 9 x 9(TQFP)48TQFP: 81 mm2: 9 x 9(TQFP)48TQFP: 81 mm2: 9 x 9(TQFP)
Power Consumption(Typ), mW155155155155155155
RatingCatalogCatalogCatalogCatalogCatalogCatalog
Reference ModeExt,IntExt,IntExt,IntExt,IntExt,IntExt,Int
Resolution, Bits161616161616
SINAD, dB92.592.592.592.592.592.5
SNR, dB939393939393
Sample Rate (max), SPS4MSPS4MSPS4MSPS4MSPS4MSPS4MSPS
Sample Rate(Max), MSPS444444
THD(Typ), dB-114-114-114-114-114-114

生态计划

ADS8422IBPFBRADS8422IBPFBTADS8422IBPFBTG4ADS8422IPFBRADS8422IPFBRG4ADS8422IPFBT
RoHSCompliantCompliantCompliantCompliantCompliantCompliant

应用须知

  • ADS8422 Example Programs
    PDF, 493 Kb, 档案已发布: Aug 30, 2006
  • Interfacing the ADS8401/ADS8411 to TMS320C6713 DSP
    PDF, 260 Kb, 档案已发布: Sep 23, 2004
    This application report presents a solution for interfacing the ADS8401 and ADS8411 16-bit, parallel interface converters to the TMS320C6713 DSP. The hardware solution consists of existing hardware, specifically the ADS8411EVM, 'C6713 DSK, and 5-6K interface board. The software demonstrates how to use an EDMA ping-pong buffer and Timer1 peripherals to collect data at 2 MSPS. Discussed also are som
  • Interfacing the ADS8402/ADS8412 to TMS320C6713 DSP
    PDF, 262 Kb, 档案已发布: Sep 23, 2004
    This application report presents a solution for interfacing the ADS8402 and ADS8412 16-bit, parallel interface converters to the TMS320C6713 DSP. The hardware solution consists of existing and orderable hardware, specifically the ADS8402EVM, 'C6713 DSK, and 5-6K interface board. The software demonstrates how to use the EDMA controller to efficiently collect data from the data converter. Discussed
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, 档案已发布: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

模型线

制造商分类

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)