Datasheet Texas Instruments ADS8517 — 数据表
| 制造商 | Texas Instruments |
| 系列 | ADS8517 |
具有S / P接口的低功耗16位200kSPS +/- 10V双极性输入SAR ADC
数据表
16-Bit 200-kSPS Low-Power Sampling ADC w/Int Ref and Par/Serial Interface datasheet
PDF, 1.4 Mb, 修订版: A, 档案已发布: Jun 5, 2009
从文件中提取
价格
状态
| ADS8517IBDW | ADS8517IBDWG4 | ADS8517IBPW | ADS8517IBPWR | ADS8517IDW | ADS8517IPW | ADS8517IPWR | |
|---|---|---|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | Yes | No | No | No | Yes | No |
打包
| ADS8517IBDW | ADS8517IBDWG4 | ADS8517IBPW | ADS8517IBPWR | ADS8517IDW | ADS8517IPW | ADS8517IPWR | |
|---|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
| Pin | 28 | 28 | 28 | 28 | 28 | 28 | 28 |
| Package Type | DW | DW | PW | PW | DW | PW | PW |
| Industry STD Term | SOIC | SOIC | TSSOP | TSSOP | SOIC | TSSOP | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 20 | 20 | 50 | 2000 | 20 | 50 | 2000 |
| Carrier | TUBE | TUBE | TUBE | LARGE T&R | TUBE | TUBE | LARGE T&R |
| Device Marking | B | ADS8517I | B | B | ADS8517I | ADS8517I | ADS8517I |
| Width (mm) | 7.5 | 7.5 | 4.4 | 4.4 | 7.5 | 4.4 | 4.4 |
| Length (mm) | 17.9 | 17.9 | 9.7 | 9.7 | 17.9 | 9.7 | 9.7 |
| Thickness (mm) | 2.35 | 2.35 | 1 | 1 | 2.35 | 1 | 1 |
| Pitch (mm) | 1.27 | 1.27 | .65 | .65 | 1.27 | .65 | .65 |
| Max Height (mm) | 2.65 | 2.65 | 1.2 | 1.2 | 2.65 | 1.2 | 1.2 |
| Mechanical Data | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 |
参数化
| Parameters / Models | ADS8517IBDW | ADS8517IBDWG4 | ADS8517IBPW | ADS8517IBPWR | ADS8517IDW | ADS8517IPW | ADS8517IPWR |
|---|---|---|---|---|---|---|---|
| # Input Channels | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
| Analog Voltage AVDD(Max), V | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 |
| Analog Voltage AVDD(Min), V | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 |
| Architecture | SAR | SAR | SAR | SAR | SAR | SAR | SAR |
| Digital Supply(Max), V | 5.25 | 5.25 | 5.25 | 5.25 | 5.25 | 5.25 | 5.25 |
| Digital Supply(Min), V | 1.65 | 1.65 | 1.65 | 1.65 | 1.65 | 1.65 | 1.65 |
| INL(Max), +/-LSB | 1.5 | 1.5 | 1.5 | 1.5 | 1.5 | 1.5 | 1.5 |
| Input Range(Max), V | 10 | 10 | 10 | 10 | 10 | 10 | 10 |
| Input Range(Min), V | -10 | -10 | -10 | -10 | -10 | -10 | -10 |
| Input Type | Single-Ended | Single-Ended | Single-Ended | Single-Ended | Single-Ended | Single-Ended | Single-Ended |
| Integrated Features | Daisy-Chainable,Oscillator | Daisy-Chainable,Oscillator | Daisy-Chainable,Oscillator | Daisy-Chainable,Oscillator | Daisy-Chainable,Oscillator | Daisy-Chainable,Oscillator | Daisy-Chainable,Oscillator |
| Interface | Parallel,SPI | Parallel,SPI | Parallel,SPI | Parallel,SPI | Parallel,SPI | Parallel,SPI | Parallel,SPI |
| Multi-Channel Configuration | N/A | N/A | N/A | N/A | N/A | N/A | N/A |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 |
| Package Group | SOIC | SOIC | TSSOP | TSSOP | SOIC | TSSOP | TSSOP |
| Package Size: mm2:W x L, PKG | 28SOIC: 184 mm2: 10.3 x 17.9(SOIC) | 28SOIC: 184 mm2: 10.3 x 17.9(SOIC) | 28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP) | 28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP) | 28SOIC: 184 mm2: 10.3 x 17.9(SOIC) | 28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP) | 28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP) |
| Power Consumption(Typ), mW | 60 | 60 | 60 | 60 | 60 | 60 | 60 |
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
| Reference Mode | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int |
| Resolution, Bits | 16 | 16 | 16 | 16 | 16 | 16 | 16 |
| SINAD, dB | 88.5 | 88.5 | 88.5 | 88.5 | 88.5 | 88.5 | 88.5 |
| SNR, dB | 89 | 89 | 89 | 89 | 89 | 89 | 89 |
| Sample Rate (max), SPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS |
| Sample Rate(Max), MSPS | 0.2 | 0.2 | 0.2 | 0.2 | 0.2 | 0.2 | 0.2 |
| THD(Typ), dB | -98 | -98 | -98 | -98 | -98 | -98 | -98 |
生态计划
| ADS8517IBDW | ADS8517IBDWG4 | ADS8517IBPW | ADS8517IBPWR | ADS8517IDW | ADS8517IPW | ADS8517IPWR | |
|---|---|---|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
应用须知
- Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, 档案已发布: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
模型线
系列: ADS8517 (7)
制造商分类
- Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)