Datasheet Texas Instruments ADS8568 — 数据表
| 制造商 | Texas Instruments |
| 系列 | ADS8568 |
16位，8通道，同步采样，双极性输入SAR ADC
数据表
ADS85x8 12-, 14-, and 16-Bit, 8-Channel, Simultaneous Sampling ADCs datasheet
PDF, 1.5 Mb, 修订版: C, 档案已发布: Feb 3, 2016
从文件中提取
价格
状态
| ADS8568SPM | ADS8568SPMR | ADS8568SRGCR | ADS8568SRGCT | |
|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes | Yes | No | No |
打包
| ADS8568SPM | ADS8568SPMR | ADS8568SRGCR | ADS8568SRGCT | |
|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 |
| Pin | 64 | 64 | 64 | 64 |
| Package Type | PM | PM | RGC | RGC |
| Industry STD Term | LQFP | LQFP | VQFN | VQFN |
| JEDEC Code | S-PQFP-G | S-PQFP-G | S-PQFP-N | S-PQFP-N |
| Package QTY | 160 | 1000 | 2000 | 250 |
| Carrier | TUBE | LARGE T&R | LARGE T&R | SMALL T&R |
| Device Marking | ADS8568 | ADS8568 | ADS8568 | ADS8568 |
| Width (mm) | 10 | 10 | 9 | 9 |
| Length (mm) | 10 | 10 | 9 | 9 |
| Thickness (mm) | 1.4 | 1.4 | .88 | .88 |
| Pitch (mm) | .5 | .5 | .5 | .5 |
| Max Height (mm) | 1.6 | 1.6 | 1 | 1 |
| Mechanical Data | 下载 | 下载 | 下载 | 下载 |
参数化
| Parameters / Models | ADS8568SPM | ADS8568SPMR | ADS8568SRGCR | ADS8568SRGCT |
|---|---|---|---|---|
| # Input Channels | 8 | 8 | 8 | 8 |
| Analog Voltage AVDD(Max), V | 5.5 | 5.5 | 5.5 | 5.5 |
| Analog Voltage AVDD(Min), V | 4.5 | 4.5 | 4.5 | 4.5 |
| Architecture | SAR | SAR | SAR | SAR |
| Digital Supply(Max), V | 5.5 | 5.5 | 5.5 | 5.5 |
| Digital Supply(Min), V | 2.7 | 2.7 | 2.7 | 2.7 |
| INL(Max), +/-LSB | 3 | 3 | 3 | 3 |
| Input Range(Max), V | 12 | 12 | 12 | 12 |
| Input Range(Min), V | -12 | -12 | -12 | -12 |
| Input Type | Single-Ended | Single-Ended | Single-Ended | Single-Ended |
| Integrated Features | Daisy-Chainable,Oscillator | Daisy-Chainable,Oscillator | Daisy-Chainable,Oscillator | Daisy-Chainable,Oscillator |
| Interface | Parallel,SPI | Parallel,SPI | Parallel,SPI | Parallel,SPI |
| Multi-Channel Configuration | Simultaneous Sampling | Simultaneous Sampling | Simultaneous Sampling | Simultaneous Sampling |
| Operating Temperature Range, C | -40 to 125 | -40 to 125 | -40 to 125 | -40 to 125 |
| Package Group | LQFP | LQFP | VQFN | VQFN |
| Package Size: mm2:W x L, PKG | 64LQFP: 144 mm2: 12 x 12(LQFP) | 64LQFP: 144 mm2: 12 x 12(LQFP) | 64VQFN: 81 mm2: 9 x 9(VQFN) | 64VQFN: 81 mm2: 9 x 9(VQFN) |
| Power Consumption(Typ), mW | 335 | 335 | 335 | 335 |
| Rating | Catalog | Catalog | Catalog | Catalog |
| Reference Mode | Ext,Int | Ext,Int | Ext,Int | Ext,Int |
| Resolution, Bits | 16 | 16 | 16 | 16 |
| SINAD, dB | 90 | 90 | 90 | 90 |
| SNR, dB | 91.5 | 91.5 | 91.5 | 91.5 |
| Sample Rate (max), SPS | 500kSPS | 500kSPS | 500kSPS | 500kSPS |
| Sample Rate(Max), MSPS | 0.5 | 0.5 | 0.5 | 0.5 |
| THD(Typ), dB | -94 | -94 | -94 | -94 |
生态计划
| ADS8568SPM | ADS8568SPMR | ADS8568SRGCR | ADS8568SRGCT | |
|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant |
应用须知
- ADS856x Design Challenges and Improvement Techniques for SAR Driver Circuit (Rev. A)PDF, 11.5 Mb, 修订版: A, 档案已发布: May 18, 2015
- ADS8528, ADS8548, and ADS8568 Timing ConsiderationsPDF, 108 Kb, 档案已发布: Jun 21, 2014
- Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, 档案已发布: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
模型线
系列: ADS8568 (4)
制造商分类
- Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)