Sitara处理器：ARM Cortex-A8、3D图形324-NFBGA 0至90
PDF, 84 Kb, 档案已发布: May 31, 2017
The Power Estimation ToolPower Estimation Tool (PET) allows you to gain insight into the power consumption of select Sitara processors. The tool includes the ability for you to choose multiple application scenarios and understand the power consumption as well as how advanced power saving techniques can be applied to further reduce overall power consumption.
PDF, 300 Kb, 修订版: A, 档案已发布: Feb 28, 2017
This document discusses techniques to develop a low power, low cost system based on the AM335x series processor. The goal is to explain how system design choices affect power consumption and how power consumption can vary significantly depending on how the developer’s application runs in that system under specific conditions.
PDF, 76 Kb, 修订版: A, 档案已发布: Aug 21, 2014
This application report discusses best-practice layout guidelines when implementing a universal serial bus (USB).
PDF, 783 Kb, 档案已发布: Mar 4, 2016
PDF, 112 Kb, 修订版: A, 档案已发布: Apr 27, 2017
Programmable Logic Controllers (PLC) are used as the main control in an automation system with high-reliability expectations and long life in harsh environments. Processors used in these applications require an assessment of performance verses expected power on hours to achieve the optimal performance for the application.
PDF, 16 Kb, 档案已发布: Apr 15, 2013
This article discusses the thermal considerations of the AM335x devices. It offers guidance on analysis of the processor's thermal performance, suggests improvements for an end system to aid in overcoming some of the existing challenges of producing a good thermal design, and provides real power/thermal data measured with AM335x EVMs for user evaluation.
PDF, 529 Kb, 档案已发布: Jun 30, 2017
Voice recognition applications requiring a superior user experience typically use a number of digital signal processing algorithms to filter, clean, and enhance microphone sampled audio. Frequently these systems will employ multiple microphones where more sophisticated algorithms can be used. These systems can leverage a Texas Instruments Digital Signal Processor to offload the complex real-time c
PDF, 59 Kb, 档案已发布: Apr 7, 2017
This migration guide details the Programmable Real-Time Unit (PRU) subsystem hardware differences and outlines software modifications required for porting PRU firmware and ARMВ® code to AM437x.
PDF, 71 Kb, 修订版: A, 档案已发布: Jul 13, 2017
This software migration guide assists in porting legacy software developed for the Programmable Real-Time Unit Subsystem and Industrial Communication Subsystem (PRU-CSS) on AM335x to AM57x platforms.
PDF, 3.1 Mb, 修订版: B, 档案已发布: Nov 13, 2015
This application report provides technical background on nFBGA packages and explains how to use them to build advanced board layouts.
PDF, 40.5 Mb, 修订版: A, 档案已发布: Aug 9, 2015
PDF, 78 Kb, 档案已发布: Aug 2, 2017
Processor-SDK RTOS provides out-of-the-box power management examples that empower customers to tailor Sitara processors’ (ARM and DSP) power-performance points per use case. You can configure all supported operating points and run CPU Idle and Dhrystone benchmarking workloads while employing a minimal kernel with real-time assurance. This application report provides an overview of the Processor-SD
PDF, 29 Kb, 档案已发布: Jun 5, 2017
This application report documents the feature differences between the PRU subsystems available on different TI processors.
PDF, 1.6 Mb, 修订版: B, 档案已发布: Aug 13, 2015
PDF, 814 Kb, 修订版: G, 档案已发布: Jul 27, 2017
As modern bus interface frequencies scale higher, care must be taken in the printed circuit board (PCB) layout phase of a design to ensure a robust solution.
