Datasheet Texas Instruments AM4377BZDNA80 — 数据表
制造商 | Texas Instruments |
系列 | AM4377 |
零件号 | AM4377BZDNA80 |
Sitara处理器:ARM Cortex-A9,安全性,EtherCAT 491-NFBGA -40至105
数据表
价格
状态
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | Yes |
打包
Pin | 491 |
Package Type | ZDN |
Package QTY | 90 |
Device Marking | AM4377BZDNA80 |
Width (mm) | 17 |
Length (mm) | 17 |
Thickness (mm) | .9 |
Mechanical Data | 下载 |
参数化
ARM CPU | 1 ARM Cortex-A9 |
ARM MHz | 800,1000 Max. |
Applications | Communications Equipment,Enterprise Systems,Industrial,Personal Electronics |
Co-Processor | 4 PRU-ICSS s |
DMIPS | 2000,2500 |
DRAM | DDR3,DDR3L,LPDDR2 |
Display Outputs | 1 |
EMAC | 2-Port 10/100 PRU EMAC,2-Port 1Gb Switch |
Graphics Acceleration | N/A |
Industrial Protocols | 1588,BiSS,EnDat 2.2,EtherCAT,EtherNet/IP,Ethernet POWERLINK,HIPERFACE DSL,PROFIBUS,PROFINET RT/IRT,SERCOS III,Sigma Delta Filter |
On-Chip L2 Cache | 256 KB (ARM Cortex-A9) |
Operating Systems | Android,Integrity,Linux,Neutrino,SYS/BIOS,VxWorks,Windows Embedded CE |
Operating Temperature Range | -40 to 105,-40 to 90 C |
Other On-Chip Memory | 320 KB |
Rating | Catalog |
Security Enabler | Cryptographic acceleration,Debug security,Device identity,Initial secure programming,Secure boot,Secure storage,Software IP protection,Trusted execution environment |
Serial I/O | CAN,I2C,SPI,UART,USB |
Video Input Ports | 1 |
生态计划
RoHS | Compliant |
设计套件和评估模块
- JTAG Emulators/ Analyzers: TMDSEMU560V2STM-UE
XDS560v2 System Trace USB & Ethernet Debug Probe
Lifecycle Status: Active (Recommended for new designs) - JTAG Emulators/ Analyzers: TMDSEMU560V2STM-U
XDS560v2 System Trace USB Debug Probe
Lifecycle Status: Active (Recommended for new designs) - Development Kits: TMDSIDK437X
AM437x Industrial Development Kit (IDK)
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: TMDXSK437X
AM437x Starter Kit
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: TMDSEVM437X
AM437x Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - JTAG Emulators/ Analyzers: TMDSEMU200-U
XDS200 USB Debug Probe
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: PRUCAPE
TI PRU Cape
Lifecycle Status: Active (Recommended for new designs)
应用须知
- Sitara AM437x DDR-Less System How-To Instructions and Benchmarks (Rev. A)PDF, 252 Kb, 修订版: A, 档案已发布: Feb 21, 2017
This application report describes a system running EtherCAT slave with motor control leveraging the rich feature set of the Texas Instruments Sitara AM437x processor. The application on the Sitara AM437x Industrial Development Kit (IDK) EVM is demonstrated by utilizing internal SRAM, QSPI memory and eliminating external DDR completely. Benchmarking data is presented and shows no impact of the syst - AM43xx EMIF ToolsPDF, 1.3 Mb, 档案已发布: Jun 1, 2017
At the center of every application is the need for memory. With limited on-chip processor memory, external memory serves as a solution for large software systems and data storage, and an unstable external memory interface can result in system failures or hinder software development. To prevent potential system level anomalies and ensure robust systems, hardware must be configured correctly and tes - AM43xx Power Estimation ToolPDF, 31 Kb, 档案已发布: Aug 7, 2017
The Power Estimation Tool (PET) provides insight into the power consumption of select Sitaraв„ў processors. The tool includes the ability to choose multiple application scenarios and understand the power consumption as well as how advanced power saving techniques can be applied to further reduce overall power consumption. - PRU-ICSS Migration Guide: AM335x to AM437xPDF, 59 Kb, 档案已发布: Apr 7, 2017
This migration guide details the Programmable Real-Time Unit (PRU) subsystem hardware differences and outlines software modifications required for porting PRU firmware and ARMВ® code to AM437x. - nFBGA Packaging (Rev. B)PDF, 3.1 Mb, 修订版: B, 档案已发布: Nov 13, 2015
This application report provides technical background on nFBGA packages and explains how to use them to build advanced board layouts. - 0.65 mm Pitch Flip Chip Ball Grid Array Package Reference Guide (Rev. A)PDF, 40.5 Mb, 修订版: A, 档案已发布: Aug 9, 2015
- Processor-SDK RTOS Power Management and MeasurementPDF, 78 Kb, 档案已发布: Aug 2, 2017
Processor-SDK RTOS provides out-of-the-box power management examples that empower customers to tailor Sitara processors’ (ARM and DSP) power-performance points per use case. You can configure all supported operating points and run CPU Idle and Dhrystone benchmarking workloads while employing a minimal kernel with real-time assurance. This application report provides an overview of the Processor-SD - PRU-ICSS Feature ComparisonPDF, 29 Kb, 档案已发布: Jun 5, 2017
This application report documents the feature differences between the PRU subsystems available on different TI processors. - Plastic Ball Grid Array [PBGA] Application Note (Rev. B)PDF, 1.6 Mb, 修订版: B, 档案已发布: Aug 13, 2015
- High-Speed Interface Layout Guidelines (Rev. G)PDF, 814 Kb, 修订版: G, 档案已发布: Jul 27, 2017
As modern bus interface frequencies scale higher, care must be taken in the printed circuit board (PCB) layout phase of a design to ensure a robust solution.
模型线
系列: AM4377 (4)
- AM4377BZDNA100 AM4377BZDNA80 AM4377BZDND100 AM4377BZDND80
制造商分类
- Semiconductors > Processors > Sitara Processors > ARM Cortex-A9 > AM437x