Datasheet Texas Instruments CD54HCT373 — 数据表

制造商Texas Instruments
系列CD54HCT373
Datasheet Texas Instruments CD54HCT373

具有三态输出的高速CMOS逻辑八路透明锁存器

数据表

CD54HCT373, CD74HCT373 datasheet
PDF, 1.3 Mb, 修订版: B, 档案已发布: May 7, 2003
从文件中提取

价格

状态

CD54HCT373FCD54HCT373F3A
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNo

打包

CD54HCT373FCD54HCT373F3A
N12
Pin2020
Package TypeJJ
Industry STD TermCDIPCDIP
JEDEC CodeR-GDIP-TR-GDIP-T
Package QTY11
CarrierTUBETUBE
Device MarkingCD54HCT373FCD54HCT373F3A
Width (mm)6.926.92
Length (mm)24.224.2
Thickness (mm)4.574.57
Pitch (mm)2.542.54
Max Height (mm)5.085.08
Mechanical Data下载下载

参数化

Parameters / ModelsCD54HCT373F
CD54HCT373F
CD54HCT373F3A
CD54HCT373F3A
3-State OutputYesYes
Bits88
F @ Nom Voltage(Max), Mhz2525
ICC @ Nom Voltage(Max), mA0.080.08
Input TypeTTLTTL
Operating Temperature Range, C-55 to 125-55 to 125
Output Drive (IOL/IOH)(Max), mA6/-66/-6
Output TypeCMOSCMOS
Package GroupCDIPCDIP
Package Size: mm2:W x L, PKGSee datasheet (CDIP)See datasheet (CDIP)
RatingMilitaryMilitary
Technology FamilyHCTHCT
VCC(Max), V5.55.5
VCC(Min), V4.54.5
tpd @ Nom Voltage(Max), ns4040

生态计划

CD54HCT373FCD54HCT373F3A
RoHSSee ti.comSee ti.com

应用须知

  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, 修订版: A, 档案已发布: Feb 6, 2015
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, 档案已发布: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren
  • SN54/74HCT CMOS Logic Family Applications and Restrictions
    PDF, 102 Kb, 档案已发布: May 1, 1996
    The TI SN54/74HCT family of CMOS devices is a subgroup of the SN74HC series with the HCT circuitry modified to meet the interfacing requirements of TTL outputs to high-speed CMOS inputs. The HCT devices can be driven by the TTL circuits directly without additional components. This document describes the TTL/HC interface the operating voltages circuit noise and power consumption. A Bergeron anal

模型线

系列: CD54HCT373 (2)

制造商分类

  • Semiconductors> Space & High Reliability> Logic Products> Flip-Flop/Latch/Registers