Datasheet Texas Instruments CD74ACT240 — 数据表

制造商	Texas Instruments
系列	CD74ACT240

具有三态输出的八路反相缓冲器/线路驱动器

数据表

PDF, 1.2 Mb, 修订版: B, 档案已发布: Jan 19, 2004

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	CD74ACT240E	CD74ACT240EE4	CD74ACT240M	CD74ACT240M96	CD74ACT240M96E4
Lifecycle Status	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)
Manufacture's Sample Availability	No	No	No	No	No

	CD74ACT240E	CD74ACT240EE4	CD74ACT240M	CD74ACT240M96	CD74ACT240M96E4
N	1	2	3	4	5
Pin	20	20	20	20	20
Package Type	N	N	DW	DW	DW
Industry STD Term	PDIP	PDIP	SOIC	SOIC	SOIC
JEDEC Code	R-PDIP-T	R-PDIP-T	R-PDSO-G	R-PDSO-G	R-PDSO-G
Package QTY	20	20	25	2000	2000
Carrier	TUBE	TUBE	TUBE	LARGE T&R	LARGE T&R
Device Marking	CD74ACT240E	CD74ACT240E	ACT240M	ACT240M	ACT240M
Width (mm)	6.35	6.35	7.5	7.5	7.5
Length (mm)	24.33	24.33	12.8	12.8	12.8
Thickness (mm)	4.57	4.57	2.35	2.35	2.35
Pitch (mm)	2.54	2.54	1.27	1.27	1.27
Max Height (mm)	5.08	5.08	2.65	2.65	2.65
Mechanical Data	下载	下载	下载	下载	下载

Parameters / Models	CD74ACT240E	CD74ACT240EE4	CD74ACT240M	CD74ACT240M96	CD74ACT240M96E4
Bits	8	8	8	8	8
F @ Nom Voltage(Max), Mhz	90	90	90	90	90
ICC @ Nom Voltage(Max), mA	0.08	0.08	0.08	0.08	0.08
Operating Temperature Range, C	-55 to 125	-55 to 125	-55 to 125	-55 to 125	-55 to 125
Output Drive (IOL/IOH)(Max), mA	-24/24	-24/24	-24/24	-24/24	-24/24
Package Group	PDIP	PDIP	SOIC	SOIC	SOIC
Package Size: mm2:W x L, PKG	See datasheet (PDIP)	See datasheet (PDIP)	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)
Rating	Catalog	Catalog	Catalog	Catalog	Catalog
Schmitt Trigger	No	No	No	No	No
Technology Family	ACT	ACT	ACT	ACT	ACT
VCC(Max), V	5.5	5.5	5.5	5.5	5.5
VCC(Min), V	4.5	4.5	4.5	4.5	4.5
Voltage(Nom), V	5	5	5	5	5
tpd @ Nom Voltage(Max), ns	6.5	6.5	6.5	6.5	6.5

	CD74ACT240E	CD74ACT240EE4	CD74ACT240M	CD74ACT240M96	CD74ACT240M96E4
RoHS	Compliant	Compliant	Compliant	Compliant	Compliant
Pb Free	Yes	Yes

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Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
PDF, 43 Kb, 档案已发布: Apr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

系列: CD74ACT240 (5)