Datasheet Texas Instruments CD74HC597 — 数据表
制造商 | Texas Instruments |
系列 | CD74HC597 |
带有输入存储的高速CMOS逻辑8位移位寄存器
数据表
价格
状态
CD74HC597E | CD74HC597EE4 | CD74HC597M | CD74HC597M96 | CD74HC597M96E4 | CD74HC597M96G4 | CD74HC597MG4 | CD74HC597MT | CD74HC597NSR | |
---|---|---|---|---|---|---|---|---|---|
Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
Manufacture's Sample Availability | No | No | No | No | No | No | No | No | No |
打包
CD74HC597E | CD74HC597EE4 | CD74HC597M | CD74HC597M96 | CD74HC597M96E4 | CD74HC597M96G4 | CD74HC597MG4 | CD74HC597MT | CD74HC597NSR | |
---|---|---|---|---|---|---|---|---|---|
N | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 |
Pin | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 |
Package Type | N | N | D | D | D | D | D | D | NS |
Industry STD Term | PDIP | PDIP | SOIC | SOIC | SOIC | SOIC | SOIC | SOIC | SOP |
JEDEC Code | R-PDIP-T | R-PDIP-T | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
Package QTY | 25 | 25 | 40 | 2500 | 2500 | 2500 | 40 | 250 | 2000 |
Carrier | TUBE | TUBE | TUBE | LARGE T&R | LARGE T&R | LARGE T&R | TUBE | SMALL T&R | LARGE T&R |
Device Marking | CD74HC597E | CD74HC597E | HC597M | HC597M | HC597M | HC597M | HC597M | HC597M | HC597M |
Width (mm) | 6.35 | 6.35 | 3.91 | 3.91 | 3.91 | 3.91 | 3.91 | 3.91 | 5.3 |
Length (mm) | 19.3 | 19.3 | 9.9 | 9.9 | 9.9 | 9.9 | 9.9 | 9.9 | 10.3 |
Thickness (mm) | 3.9 | 3.9 | 1.58 | 1.58 | 1.58 | 1.58 | 1.58 | 1.58 | 1.95 |
Pitch (mm) | 2.54 | 2.54 | 1.27 | 1.27 | 1.27 | 1.27 | 1.27 | 1.27 | 1.27 |
Max Height (mm) | 5.08 | 5.08 | 1.75 | 1.75 | 1.75 | 1.75 | 1.75 | 1.75 | 2 |
Mechanical Data | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 |
参数化
Parameters / Models | CD74HC597E | CD74HC597EE4 | CD74HC597M | CD74HC597M96 | CD74HC597M96E4 | CD74HC597M96G4 | CD74HC597MG4 | CD74HC597MT | CD74HC597NSR |
---|---|---|---|---|---|---|---|---|---|
3-State Output | No | No | No | No | No | No | No | No | No |
F @ Nom Voltage(Max), Mhz | 28 | 28 | 28 | 28 | 28 | 28 | 28 | 28 | 28 |
ICC @ Nom Voltage(Max), mA | 0.08 | 0.08 | 0.08 | 0.08 | 0.08 | 0.08 | 0.08 | 0.08 | 0.08 |
Operating Temperature Range, C | -55 to 125 | -55 to 125 | -55 to 125 | -55 to 125 | -55 to 125 | -55 to 125 | -55 to 125 | -55 to 125 | -55 to 125 |
Output Drive (IOL/IOH)(Max), mA | 5.2/-5.2 | 5.2/-5.2 | 5.2/-5.2 | 5.2/-5.2 | 5.2/-5.2 | 5.2/-5.2 | 5.2/-5.2 | 5.2/-5.2 | 5.2/-5.2 |
Package Group | PDIP | PDIP | SOIC | SOIC | SOIC | SOIC | SOIC | SOIC | SO |
Package Size: mm2:W x L, PKG | See datasheet (PDIP) | See datasheet (PDIP) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SO: 80 mm2: 7.8 x 10.2(SO) |
Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
Schmitt Trigger | No | No | No | No | No | No | No | No | No |
Technology Family | HC | HC | HC | HC | HC | HC | HC | HC | HC |
VCC(Max), V | 6 | 6 | 6 | 6 | 6 | 6 | 6 | 6 | 6 |
VCC(Min), V | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 |
Voltage(Nom), V | 6 | 6 | 6 | 6 | 6 | 6 | 6 | 6 | 6 |
tpd @ Nom Voltage(Max), ns | 37 | 37 | 37 | 37 | 37 | 37 | 37 | 37 | 37 |
生态计划
CD74HC597E | CD74HC597EE4 | CD74HC597M | CD74HC597M96 | CD74HC597M96E4 | CD74HC597M96G4 | CD74HC597MG4 | CD74HC597MT | CD74HC597NSR | |
---|---|---|---|---|---|---|---|---|---|
RoHS | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
Pb Free | Yes | Yes |
应用须知
- Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Kb, 修订版: A, 档案已发布: Feb 6, 2015
- SN54/74HCT CMOS Logic Family Applications and RestrictionsPDF, 102 Kb, 档案已发布: May 1, 1996
The TI SN54/74HCT family of CMOS devices is a subgroup of the SN74HC series with the HCT circuitry modified to meet the interfacing requirements of TTL outputs to high-speed CMOS inputs. The HCT devices can be driven by the TTL circuits directly without additional components. This document describes the TTL/HC interface the operating voltages circuit noise and power consumption. A Bergeron anal
模型线
系列: CD74HC597 (9)
制造商分类
- Semiconductors> Logic> Flip-Flop/Latch/Register> Shift Register