Datasheet Texas Instruments CD74HCT40103 — 数据表

制造商Texas Instruments
系列CD74HCT40103
Datasheet Texas Instruments CD74HCT40103

高速CMOS逻辑8级同步向下计数器

数据表

CD54HC40103, CD74HC40103, CD74HCT40103 datasheet
PDF, 460 Kb, 修订版: D, 档案已发布: Oct 16, 2003
从文件中提取

价格

状态

CD74HCT40103ECD74HCT40103EE4CD74HCT40103MCD74HCT40103M96CD74HCT40103M96G4CD74HCT40103MG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNo

打包

CD74HCT40103ECD74HCT40103EE4CD74HCT40103MCD74HCT40103M96CD74HCT40103M96G4CD74HCT40103MG4
N123456
Pin161616161616
Package TypeNNDDDD
Industry STD TermPDIPPDIPSOICSOICSOICSOIC
JEDEC CodeR-PDIP-TR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY2525402500250040
CarrierTUBETUBETUBELARGE T&RLARGE T&RTUBE
Device MarkingCD74HCT40103ECD74HCT40103EHCT40103MHCT40103MHCT40103MHCT40103M
Width (mm)6.356.353.913.913.913.91
Length (mm)19.319.39.99.99.99.9
Thickness (mm)3.93.91.581.581.581.58
Pitch (mm)2.542.541.271.271.271.27
Max Height (mm)5.085.081.751.751.751.75
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参数化

Parameters / ModelsCD74HCT40103E
CD74HCT40103E
CD74HCT40103EE4
CD74HCT40103EE4
CD74HCT40103M
CD74HCT40103M
CD74HCT40103M96
CD74HCT40103M96
CD74HCT40103M96G4
CD74HCT40103M96G4
CD74HCT40103MG4
CD74HCT40103MG4
Bits888888
F @ Nom Voltage(Max), Mhz252525252525
FunctionCounterCounterCounterCounterCounterCounter
ICC @ Nom Voltage(Max), mA0.080.080.080.080.080.08
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125
Output Drive (IOL/IOH)(Max), mA4/-44/-44/-44/-44/-44/-4
Package GroupPDIPPDIPSOICSOICSOICSOIC
Package Size: mm2:W x L, PKGSee datasheet (PDIP)See datasheet (PDIP)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)
RatingCatalogCatalogCatalogCatalogCatalogCatalog
Technology FamilyHCTHCTHCTHCTHCTHCT
TypeBinaryBinaryBinaryBinaryBinaryBinary
VCC(Max), V5.55.55.55.55.55.5
VCC(Min), V4.54.54.54.54.54.5
Voltage(Nom), V555555
tpd @ Nom Voltage(Max), ns858585858585

生态计划

CD74HCT40103ECD74HCT40103EE4CD74HCT40103MCD74HCT40103M96CD74HCT40103M96G4CD74HCT40103MG4
RoHSCompliantCompliantCompliantCompliantCompliantCompliant
Pb FreeYesYes

应用须知

  • Wave Solder Exposure of SMT Packages
    PDF, 206 Kb, 档案已发布: Sep 9, 2008
    It is common practice to attach surface mount components to the underside of a printed circuit board (PCB) by processing the PCB through a wave soldering operation after gluing the components to the PCB. This paper ummarizes results of several tests performed to understand the performance of surface mount components when exposed to the conditions outlined in JESD22A111.

模型线

制造商分类

  • Semiconductors> Logic> Specialty Logic> Counter/Arithmetic/Parity Function