Datasheet Texas Instruments CD74HCT40103 — 数据表
制造商 | Texas Instruments |
系列 | CD74HCT40103 |
高速CMOS逻辑8级同步向下计数器
数据表
价格
状态
CD74HCT40103E | CD74HCT40103EE4 | CD74HCT40103M | CD74HCT40103M96 | CD74HCT40103M96G4 | CD74HCT40103MG4 | |
---|---|---|---|---|---|---|
Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
Manufacture's Sample Availability | No | No | No | No | No | No |
打包
CD74HCT40103E | CD74HCT40103EE4 | CD74HCT40103M | CD74HCT40103M96 | CD74HCT40103M96G4 | CD74HCT40103MG4 | |
---|---|---|---|---|---|---|
N | 1 | 2 | 3 | 4 | 5 | 6 |
Pin | 16 | 16 | 16 | 16 | 16 | 16 |
Package Type | N | N | D | D | D | D |
Industry STD Term | PDIP | PDIP | SOIC | SOIC | SOIC | SOIC |
JEDEC Code | R-PDIP-T | R-PDIP-T | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
Package QTY | 25 | 25 | 40 | 2500 | 2500 | 40 |
Carrier | TUBE | TUBE | TUBE | LARGE T&R | LARGE T&R | TUBE |
Device Marking | CD74HCT40103E | CD74HCT40103E | HCT40103M | HCT40103M | HCT40103M | HCT40103M |
Width (mm) | 6.35 | 6.35 | 3.91 | 3.91 | 3.91 | 3.91 |
Length (mm) | 19.3 | 19.3 | 9.9 | 9.9 | 9.9 | 9.9 |
Thickness (mm) | 3.9 | 3.9 | 1.58 | 1.58 | 1.58 | 1.58 |
Pitch (mm) | 2.54 | 2.54 | 1.27 | 1.27 | 1.27 | 1.27 |
Max Height (mm) | 5.08 | 5.08 | 1.75 | 1.75 | 1.75 | 1.75 |
Mechanical Data | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 |
参数化
Parameters / Models | CD74HCT40103E | CD74HCT40103EE4 | CD74HCT40103M | CD74HCT40103M96 | CD74HCT40103M96G4 | CD74HCT40103MG4 |
---|---|---|---|---|---|---|
Bits | 8 | 8 | 8 | 8 | 8 | 8 |
F @ Nom Voltage(Max), Mhz | 25 | 25 | 25 | 25 | 25 | 25 |
Function | Counter | Counter | Counter | Counter | Counter | Counter |
ICC @ Nom Voltage(Max), mA | 0.08 | 0.08 | 0.08 | 0.08 | 0.08 | 0.08 |
Operating Temperature Range, C | -55 to 125 | -55 to 125 | -55 to 125 | -55 to 125 | -55 to 125 | -55 to 125 |
Output Drive (IOL/IOH)(Max), mA | 4/-4 | 4/-4 | 4/-4 | 4/-4 | 4/-4 | 4/-4 |
Package Group | PDIP | PDIP | SOIC | SOIC | SOIC | SOIC |
Package Size: mm2:W x L, PKG | See datasheet (PDIP) | See datasheet (PDIP) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) |
Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
Technology Family | HCT | HCT | HCT | HCT | HCT | HCT |
Type | Binary | Binary | Binary | Binary | Binary | Binary |
VCC(Max), V | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 |
VCC(Min), V | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 |
Voltage(Nom), V | 5 | 5 | 5 | 5 | 5 | 5 |
tpd @ Nom Voltage(Max), ns | 85 | 85 | 85 | 85 | 85 | 85 |
生态计划
CD74HCT40103E | CD74HCT40103EE4 | CD74HCT40103M | CD74HCT40103M96 | CD74HCT40103M96G4 | CD74HCT40103MG4 | |
---|---|---|---|---|---|---|
RoHS | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
Pb Free | Yes | Yes |
应用须知
- Wave Solder Exposure of SMT PackagesPDF, 206 Kb, 档案已发布: Sep 9, 2008
It is common practice to attach surface mount components to the underside of a printed circuit board (PCB) by processing the PCB through a wave soldering operation after gluing the components to the PCB. This paper ummarizes results of several tests performed to understand the performance of surface mount components when exposed to the conditions outlined in JESD22A111.
模型线
系列: CD74HCT40103 (6)
制造商分类
- Semiconductors> Logic> Specialty Logic> Counter/Arithmetic/Parity Function