CDC341
1-LINE TO 8-LINE CLOCK DRIVER
SCAS333D – DECEMBER 1992 – REVISED OCTOBER 1998 D
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(TOP VIEW) Low Output Skew, Low Pulse Skew for
Clock-Distribution and Clock-Generation
Applications
TTL-Compatible Inputs and Outputs
Distributes One Clock Input to Eight
Outputs
Distributed VCC and Ground Pins Reduce
Switching Noise
High-Drive Outputs (– 48-mA IOH,
48-mA IOL)
State-of-the-Art EPIC-О™О™B пЈЄ BiCMOS Design
Significantly Reduces Power Dissipation
Packaging Options Include Plastic
Small-Outline (DW) Packages VCC …
