Datasheet Texas Instruments CDC582 — 数据表

制造商Texas Instruments
系列CDC582
Datasheet Texas Instruments CDC582

具有LVPECL输出和LVTTL输出且具有1 / 2x,1x和2x频率选项的3.3V PLL时钟驱动器

数据表

3.3-V Phase-Lock Loop Clock Driver With Differential LVPECL Clock Inputs datasheet
PDF, 150 Kb, 修订版: B, 档案已发布: Feb 1, 1996
从文件中提取

价格

状态

CDC582PAHCDC582PAHG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesYes

打包

CDC582PAHCDC582PAHG4
N12
Pin5252
Package TypePAHPAH
Industry STD TermTQFPTQFP
JEDEC CodeS-PQFP-GS-PQFP-G
Package QTY160160
CarrierJEDEC TRAY (10+1)JEDEC TRAY (10+1)
Device MarkingCDC582CDC582
Width (mm)1010
Length (mm)1010
Thickness (mm)11
Pitch (mm).65.65
Max Height (mm)1.21.2
Mechanical Data下载下载

参数化

Parameters / ModelsCDC582PAH
CDC582PAH
CDC582PAHG4
CDC582PAHG4
Absolute Jitter (Peak-to-Peak Cycle or Period Jitter), ps200200
Number of Outputs1212
Operating Frequency Range(Max), MHz100100
Operating Frequency Range(Min), MHz2525
Package GroupTQFPTQFP
Package Size: mm2:W x L, PKG52TQFP: 144 mm2: 12 x 12(TQFP)52TQFP: 144 mm2: 12 x 12(TQFP)
RatingCatalogCatalog
VCC, V3.33.3
t(phase error), ps500500
tsk(o), ps500500

生态计划

CDC582PAHCDC582PAHG4
RoHSCompliantCompliant

应用须知

  • Application and Design Considerations for CDC5xx Phase-Lock Loop Clock Drivers
    PDF, 101 Kb, 档案已发布: Apr 1, 1996
    Today?s high-speed system designs require stringent propagation and skew parameters to maintain desired system performance. TI developed the CDC5XX platform of PLL clock drivers to meet the need for high-performance clock system components. This document describes the features and functions of the CDC5XX and discusses design considerations and configurations for the CDC586, CDC582, and CDC2582 clo

模型线

系列: CDC582 (2)

制造商分类

  • Semiconductors> Clock and Timing> Clock Buffers> Zero Delay Buffers