Datasheet Texas Instruments CDCL1810 — 数据表

制造商Texas Instruments
系列CDCL1810
Datasheet Texas Instruments CDCL1810

1.8V 1至10高性能差分时钟缓冲器

数据表

CDCL1810 1.8-V, 10 Output, High-Performance Clock Distributor datasheet
PDF, 972 Kb, 修订版: D, 档案已发布: Nov 10, 2014
从文件中提取

价格

状态

CDCL1810RGZRCDCL1810RGZRG4CDCL1810RGZTCDCL1810RGZTG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesNoYesNo

打包

CDCL1810RGZRCDCL1810RGZRG4CDCL1810RGZTCDCL1810RGZTG4
N1234
Pin48484848
Package TypeRGZRGZRGZRGZ
Industry STD TermVQFNVQFNVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-NS-PQFP-NS-PQFP-N
Package QTY25002500250250
CarrierLARGE T&RLARGE T&RSMALL T&RSMALL T&R
Device Marking1810CDCL1810CDCL
Width (mm)7777
Length (mm)7777
Thickness (mm).9.9.9.9
Pitch (mm).5.5.5.5
Max Height (mm)1111
Mechanical Data下载下载下载下载

参数化

Parameters / ModelsCDCL1810RGZR
CDCL1810RGZR
CDCL1810RGZRG4
CDCL1810RGZRG4
CDCL1810RGZT
CDCL1810RGZT
CDCL1810RGZTG4
CDCL1810RGZTG4
Additive RMS Jitter(Typ), fs40404040
Input Frequency(Max), MHz650650650650
Input LevelLVDSLVDSLVDSLVDS
Number of Outputs10101010
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85
Output Frequency(Max), MHz650650650650
Output LevelCMLCMLCMLCML
Package GroupVQFNVQFNVQFNVQFN
Package Size: mm2:W x L, PKG48VQFN: 49 mm2: 7 x 7(VQFN)48VQFN: 49 mm2: 7 x 7(VQFN)48VQFN: 49 mm2: 7 x 7(VQFN)48VQFN: 49 mm2: 7 x 7(VQFN)
RatingCatalogCatalogCatalogCatalog
VCC, V1.81.81.81.8
VCC Out, V1.81.81.81.8

生态计划

CDCL1810RGZRCDCL1810RGZRG4CDCL1810RGZTCDCL1810RGZTG4
RoHSCompliantCompliantCompliantCompliant

模型线

制造商分类

  • Semiconductors> Clock and Timing> Clock Buffers> Dividers