Datasheet Texas Instruments CDCL6010RGZR — 数据表
制造商 | Texas Instruments |
系列 | CDCL6010 |
零件号 | CDCL6010RGZR |
1.8V 11输出时钟乘法器,分配器,抖动清除器和缓冲器48-VQFN -40至85
数据表
1.8V, 11 Output Clock Multiplier, Distributor, Jitter Cleaner & Buffer datasheet
PDF, 878 Kb, 修订版: B, 档案已发布: Mar 28, 2011
从文件中提取
价格
状态
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | No |
打包
Pin | 48 | 48 |
Package Type | RGZ | RGZ |
Industry STD Term | VQFN | VQFN |
JEDEC Code | S-PQFP-N | S-PQFP-N |
Package QTY | 2500 | 2500 |
Carrier | LARGE T&R | LARGE T&R |
Device Marking | 6010 | CDCL |
Width (mm) | 7 | 7 |
Length (mm) | 7 | 7 |
Thickness (mm) | .9 | .9 |
Pitch (mm) | .5 | .5 |
Max Height (mm) | 1 | 1 |
Mechanical Data | 下载 | 下载 |
参数化
Input Level | Crystal, LVCMOS |
Number of Outputs | 2 |
Operating Temperature Range | -40 to 85 C |
Output Frequency(Max) | 683.28 MHz |
Output Frequency(Min) | 15 MHz |
Output Level | LVPECL, LVDS, LVCMOS |
Package Group | VQFN |
Package Size: mm2:W x L | 48VQFN: 49 mm2: 7 x 7(VQFN) PKG |
Programmability | Pin configuration |
Special Features | I2C |
VCC Core | 3.3 V |
VCC Out | 3.3 V |
生态计划
RoHS | Compliant |
设计套件和评估模块
- Evaluation Modules & Boards: CDCL6010EVM
CDCL6010EVM Evaluation Module
Lifecycle Status: Preview (Device has been announced but is not in production. Samples may or may not be available)
应用须知
- CDCL6010 as a Frequency Synthesizer and Jitter CleanerPDF, 585 Kb, 档案已发布: Mar 14, 2007
This application report provides general guidelines for using the TI 1.8V LVDS/LVCMOS clock receiver CDCL6010 as a frequency synthesizer and/or jitter cleaner. This report reviews the basic device functionality and most efficient methods of use. The document also includes a detailed discussion of generating multiple frequencies with a common input frequency as well as a practical example of this
模型线
系列: CDCL6010 (4)
- CDCL6010RGZR CDCL6010RGZRG4 CDCL6010RGZT CDCL6010RGZTG4
制造商分类
- Semiconductors > Clock and Timing > Clock Generators > General Purpose