Datasheet Texas Instruments CDCLVC1102 — 数据表

制造商Texas Instruments
系列CDCLVC1102
Datasheet Texas Instruments CDCLVC1102

低抖动,1:2 LVCMOS扇出时钟缓冲器

数据表

CDCLVC11xx 3.3-V and 2.5-V LVCMOS High-Performance Clock Buffer Family datasheet
PDF, 1.6 Mb, 修订版: B, 档案已发布: Feb 24, 2017
从文件中提取

价格

状态

CDCLVC1102PWCDCLVC1102PWR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesYes

打包

CDCLVC1102PWCDCLVC1102PWR
N12
Pin88
Package TypePWPW
Industry STD TermTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-G
Package QTY1502000
CarrierTUBELARGE T&R
Device MarkingC9C2C9C2
Width (mm)4.44.4
Length (mm)33
Thickness (mm)11
Pitch (mm).65.65
Max Height (mm)1.21.2
Mechanical Data下载下载

参数化

Parameters / ModelsCDCLVC1102PW
CDCLVC1102PW
CDCLVC1102PWR
CDCLVC1102PWR
Additive RMS Jitter(Typ), fs7070
Input Frequency(Max), MHz250250
Input LevelLVCMOSLVCMOS
Number of Outputs22
Operating Temperature Range, C-40 to 85-40 to 85
Output Frequency(Max), MHz250250
Output LevelLVCMOSLVCMOS
Package GroupTSSOPTSSOP
Package Size: mm2:W x L, PKG8TSSOP: 19 mm2: 6.4 x 3(TSSOP)8TSSOP: 19 mm2: 6.4 x 3(TSSOP)
RatingCatalogCatalog
VCC Out, V2.5,3.32.5,3.3

生态计划

CDCLVC1102PWCDCLVC1102PWR
RoHSCompliantCompliant

应用须知

  • How to Apply 1.8-V Signals to 3.3-V CDCLVC11xx Fanout Clock Buffer
    PDF, 518 Kb, 档案已发布: Nov 30, 2010
    The CDCLVC11xx buffer family from Texas Instruments has a nominal voltage supply of 2.5 V and 3.3 V. With the simple employment of an external RC network, this family of devices can handle incoming signals whose voltage levels go up to 1.8 V. This application report explains how to implement this network and dimension its discrete components, without impacting the specifications of additive ji

模型线

系列: CDCLVC1102 (2)

制造商分类

  • Semiconductors> Clock and Timing> Clock Buffers> Single-Ended