Datasheet Texas Instruments CDCLVC1310 — 数据表

CDCLVC1310
www.ti.com SCAS917E – JULY 2011 – REVISED JANUARY 2014 Ten-Output Low-Jitter Low-Power Clock Buffer and Level Translator
Check for Samples: CDCLVC1310 FEATURES APPLICATIONS 1 High-Performance Crystal Buffer With Ultralow
Noise Floor of –169 dBc/Hz
Additive Phase Noise/Jitter Performance Is
25 fsRMS (Typ.)
Level Translation With 3.3-V or 2.5-V Core and
3.3-V, 2.5-V, 1.8-V, or 1.5-V Output Supply
Device inputs consist of primary, secondary,
and crystal inputs, and manually selectable
(through pins) using the input MUX. The
primary and secondary inputs can accept
LVPECL, LVDS, HCSL, SSTL or LVCMOS
signals and crystal input.
– Crystal Frequencies Supported Are From
8 MHz to 50 MHz
– Differential and Single-Ended Input
Frequencies Supported Are up to 200 MHz
10 Single-Ended LVCMOS Outputs. The
outputs can operate at 1.5-V, 1.8-V, 2.5-V or
3.3-V Power-Supply Voltage.
– LVCMOS Outputs Operate up to 200 MHz
– Output Skew Is 30 ps (Typical) …