Datasheet Texas Instruments CDCM61001RHBT — 数据表
| 制造商 | Texas Instruments |
| 系列 | CDCM61001 |
| 零件号 | CDCM61001RHBT |
1：1超低抖动晶体输入时钟发生器32-VQFN
数据表
One Output, Integrated VCO, Low-Jitter Clock Generator.. datasheet
PDF, 948 Kb, 修订版: F, 档案已发布: Jun 2, 2011
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价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
打包
| Pin | 32 | 32 |
| Package Type | RHB | RHB |
| Industry STD Term | VQFN | VQFN |
| JEDEC Code | S-PQFP-N | S-PQFP-N |
| Package QTY | 250 | 250 |
| Carrier | SMALL T&R | SMALL T&R |
| Device Marking | CDCM | 61001 |
| Width (mm) | 5 | 5 |
| Length (mm) | 5 | 5 |
| Thickness (mm) | .9 | .9 |
| Pitch (mm) | .5 | .5 |
| Max Height (mm) | 1 | 1 |
| Mechanical Data | 下载 | 下载 |
参数化
| Input Level | Crystal,LVCMOS |
| Number of Outputs | 1 |
| Output Frequency(Max) | 683.28 MHz |
| Output Frequency(Min) | 43.75 MHz |
| Output Level | LVPECL,LVDS,LVCMOS |
| Package Group | VQFN |
| Package Size: mm2:W x L | 32VQFN: 25 mm2: 5 x 5(VQFN) PKG |
| Programmability | Pin configuration |
| Special Features | Pin Programming |
| VCC Core | 3.3 V |
| VCC Out | 3.3 V |
生态计划
| RoHS | Compliant |
设计套件和评估模块
- Evaluation Modules & Boards: CDCM6100XEVM
CDCM61004/CDCM61002/CDCM61001 Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
应用须知
- Fibre Channel and SAN Clock Generation Using the CDCM6100xPDF, 322 Kb, 档案已发布: Feb 18, 2009
This application report is a guide for using Texas Instruments CDCM6100x in a Fibre Channel application as a clock distributor and clock synthesizer along with measured jitter performance results. - Using LVCMOS Input to the CDCM6100xPDF, 66 Kb, 档案已发布: May 23, 2010
This application report is a general guide for using LVCMOS inputs to the CDCM6100x series of ultra-low jitter clock generators from Texas Instruments. This document explains the basic connectivity of LVCMOS inputs to the CDCM6100x and recommends several methods for using the device that ensure proper operation. - Ethernet Clock Generation Using the CDCM6100xPDF, 454 Kb, 档案已发布: Feb 18, 2009
This application report is a guide for using Texas Instruments CDCM6100x in an Ethernet LAN and WAN application as a clock distributor and clock synthesizer along with measured jitter performance results. - TI Powers Altera's Arria II GX FPGA Development KitPDF, 596 Kb, 档案已发布: Sep 29, 2009
模型线
系列: CDCM61001 (3)
- CDCM61001RHBR CDCM61001RHBR/2801 CDCM61001RHBT
制造商分类
- Semiconductors > Clock and Timing > Clock Generators > General Purpose