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CDCV855, CDCV855I
2.5-V PHASE-LOCK LOOP CLOCK DRIVER
SCAS660A – SEPTEMBER 2001 – REVISED DECEMBER 2002 D Phase-Lock Loop Clock Driver for Double
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D PW PACKAGE
(TOP VIEW) Data-Rate Synchronous DRAM
Applications
Spread Spectrum Clock Compatible
Operating Frequency: 60 MHz to 180 MHz
Low Jitter (cyc–cyc): ±50 ps
Distributes One Differential Clock Input to
Four Differential Clock Outputs
Enters Low Power Mode and Three-State
Outputs When Input CLK Signal Is Less
Than 20 MHz or PWRDWN Is Low
Operates From Dual 2.5-V Supplies …