Datasheet Texas Instruments CDCVF25081DRG4 — 数据表

制造商Texas Instruments
系列CDCVF25081
零件号CDCVF25081DRG4
Datasheet Texas Instruments CDCVF25081DRG4

1:8 3.3V锁相环时钟驱动器16-SOIC -40至85

数据表

3.3V Phased-Lock Loop Clock Driver datasheet
PDF, 632 Kb, 修订版: A, 档案已发布: Feb 6, 2003
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin16
Package TypeD
Industry STD TermSOIC
JEDEC CodeR-PDSO-G
Package QTY2500
CarrierLARGE T&R
Device MarkingCKV25081
Width (mm)3.91
Length (mm)9.9
Thickness (mm)1.58
Pitch (mm)1.27
Max Height (mm)1.75
Mechanical Data下载

参数化

Absolute Jitter (Peak-to-Peak Cycle or Period Jitter)100 ps
Number of Outputs8
Operating Frequency Range(Max)200 MHz
Operating Frequency Range(Min)10 MHz
Operating Temperature Range-40 to 85 C
Package GroupSOIC
Package Size: mm2:W x L16SOIC: 59 mm2: 6 x 9.9(SOIC) PKG
RatingCatalog
VCC3.3 V
t(phase error)200 ps
tsk(o)150 ps

生态计划

RoHSCompliant

应用须知

  • Using TI's CDCVF2310 and CDCVF25081 with TLK1501 Serial Transceiver
    PDF, 1.2 Mb, 档案已发布: May 14, 2003
    This test report discusses jitter transfer of the TI CDCVF2310 and CDCVF25081 clock drivers when driving the TI TLK1501 serial gigabit transceiver at 600 Mbit/sec. This application report summarizes the peak-to-peak and RMS jitter measurements taken during the testing of the clock drivers with the TLK1501. The CDCVF2310 is a high performance clock buffer that provides 10 low-skew copies of CLK at

模型线

制造商分类

  • Semiconductors > Clock and Timing > Clock Buffers > Zero Delay Buffers