Datasheet Texas Instruments DAC122S085 — 数据表

制造商Texas Instruments
系列DAC122S085
Datasheet Texas Instruments DAC122S085

具有轨至轨输出的12位微功耗DUAL数模转换器

数据表

DAC122S085 12-Bit Micro Pwr DUAL DAC w/Rail-to-Rail Output datasheet
PDF, 1.2 Mb, 修订版: E, 档案已发布: Mar 19, 2013
从文件中提取

价格

状态

DAC122S085CIMMDAC122S085CIMM/NOPBDAC122S085CIMMX/NOPBDAC122S085CISD/NOPBDAC122S085CISDX/NOPB
Lifecycle StatusNRND (Not recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoYesNoYesNo

打包

DAC122S085CIMMDAC122S085CIMM/NOPBDAC122S085CIMMX/NOPBDAC122S085CISD/NOPBDAC122S085CISDX/NOPB
N12345
Pin1010101010
Package TypeDGSDGSDGSDSCDSC
Industry STD TermVSSOPVSSOPVSSOPWSONWSON
JEDEC CodeS-PDSO-GS-PDSO-GS-PDSO-GS-PDSO-NS-PDSO-N
Package QTY10001000350010004500
CarrierSMALL T&RSMALL T&RLARGE T&RSMALL T&RLARGE T&R
Device MarkingX72CX72CX72CX73CX73C
Width (mm)33333
Length (mm)33333
Thickness (mm)1.021.021.02.75.75
Pitch (mm).5.5.5.5.5
Max Height (mm)1.071.071.07.8.8
Mechanical Data下载下载下载下载下载

参数化

Parameters / ModelsDAC122S085CIMM
DAC122S085CIMM
DAC122S085CIMM/NOPB
DAC122S085CIMM/NOPB
DAC122S085CIMMX/NOPB
DAC122S085CIMMX/NOPB
DAC122S085CISD/NOPB
DAC122S085CISD/NOPB
DAC122S085CISDX/NOPB
DAC122S085CISDX/NOPB
Code to Code Glitch(Typ), nV-sec1212121212
DAC ArchitectureStringStringStringStringString
DAC Channels22222
Gain Error(Max), %FSR11111
INL(Max), +/-LSB88888
InterfaceSPISPISPISPISPI
Operating Temperature Range, C-40 to 105-40 to 105-40 to 105-40 to 105-40 to 105
Output Range Max., mA/V5.55.55.55.55.5
Output TypeBuffered VoltageBuffered VoltageBuffered VoltageBuffered VoltageBuffered Voltage
Package GroupVSSOPVSSOPVSSOPWSONWSON
Package Size: mm2:W x L, PKG10VSSOP: 15 mm2: 4.9 x 3(VSSOP)10VSSOP: 15 mm2: 4.9 x 3(VSSOP)10VSSOP: 15 mm2: 4.9 x 3(VSSOP)See datasheet (WSON)See datasheet (WSON)
Power Consumption(Typ), mW0.60.60.60.60.6
RatingCatalogCatalogCatalogCatalogCatalog
Reference: TypeExtExtExtExtExt
Resolution, Bits1212121212
Sample / Update Rate, MSPS2.52.52.52.52.5
Settling Time, µs8.58.58.58.58.5
Special FeaturesN/AN/AN/AN/AN/A
Zero Code Error(Typ), mV1515151515

生态计划

DAC122S085CIMMDAC122S085CIMM/NOPBDAC122S085CIMMX/NOPBDAC122S085CISD/NOPBDAC122S085CISDX/NOPB
RoHSSee ti.comCompliantCompliantCompliantCompliant

应用须知

  • Bridging the Divide: A DAC Applications Tutorial (Precision Signal Path)
    PDF, 1.9 Mb, 档案已发布: Sep 23, 2010
  • AN-2001 Daisy Chaining Precision DACs (Rev. A)
    PDF, 75 Kb, 修订版: A, 档案已发布: May 1, 2013
    It is not uncommon for the system designer to face a quagmire of reconciling the system complexity withthe desire to keep the system footprint small. One specific example that often arises in the context ofsmall system footprint is the need for single master controller to communicate with a number of slavedevices. This is not much of a problem if the master controller has multiple I/O resour

模型线

制造商分类

  • Semiconductors> Data Converters> Digital-to-Analog Converters (DACs)> Precision DACs (=<10MSPS)