Datasheet Texas Instruments DAC902 — 数据表
| 制造商 | Texas Instruments |
| 系列 | DAC902 |
12位165MSPS数模转换器（DAC）
数据表
DAC902 SpeedPlus 12-Bit 165-MSPS Digital-to-Analog Converter datasheet
PDF, 1.0 Mb, 修订版: B, 档案已发布: May 29, 2002
从文件中提取
价格
状态
| DAC902E | DAC902E/2K5 | DAC902U | DAC902U/1K | |
|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes | Yes | No | No |
打包
| DAC902E | DAC902E/2K5 | DAC902U | DAC902U/1K | |
|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 |
| Pin | 28 | 28 | 28 | 28 |
| Package Type | PW | PW | DW | DW |
| Industry STD Term | TSSOP | TSSOP | SOIC | SOIC |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 50 | 2500 | 20 | 1000 |
| Carrier | TUBE | LARGE T&R | TUBE | LARGE T&R |
| Device Marking | DAC902E | DAC902E | DAC902U | DAC902U |
| Width (mm) | 4.4 | 4.4 | 7.5 | 7.5 |
| Length (mm) | 9.7 | 9.7 | 17.9 | 17.9 |
| Thickness (mm) | 1 | 1 | 2.35 | 2.35 |
| Pitch (mm) | .65 | .65 | 1.27 | 1.27 |
| Max Height (mm) | 1.2 | 1.2 | 2.65 | 2.65 |
| Mechanical Data | 下载 | 下载 | 下载 | 下载 |
参数化
| Parameters / Models | DAC902E | DAC902E/2K5 | DAC902U | DAC902U/1K |
|---|---|---|---|---|
| Architecture | Current Source | Current Source | Current Source | Current Source |
| DAC Channels | 1 | 1 | 1 | 1 |
| Interface | Parallel CMOS | Parallel CMOS | Parallel CMOS | Parallel CMOS |
| Interpolation | 1x | 1x | 1x | 1x |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 |
| Package Group | TSSOP | TSSOP | SOIC | SOIC |
| Package Size: mm2:W x L, PKG | 28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP) | 28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP) | 28SOIC: 184 mm2: 10.3 x 17.9(SOIC) | 28SOIC: 184 mm2: 10.3 x 17.9(SOIC) |
| Power Consumption(Typ), mW | 170 | 170 | 170 | 170 |
| Rating | Catalog | Catalog | Catalog | Catalog |
| Resolution, Bits | 12 | 12 | 12 | 12 |
| SFDR, dB | 67 | 67 | 67 | 67 |
| Sample / Update Rate, MSPS | 200 | 200 | 200 | 200 |
生态计划
| DAC902E | DAC902E/2K5 | DAC902U | DAC902U/1K | |
|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant |
应用须知
- Interfacing op amps to high-speed DACs, Part 2: Current-sourcing DACsPDF, 617 Kb, 档案已发布: Oct 4, 2009
- High Speed Digital-to-Analog Converters Basics (Rev. A)PDF, 829 Kb, 修订版: A, 档案已发布: Oct 23, 2012
- Q4 2009 Issue Analog Applications JournalPDF, 1.5 Mb, 档案已发布: Oct 4, 2009
- Wideband Complementary Current Output DAC Single-Ended InterfacePDF, 597 Kb, 档案已发布: Jun 21, 2005
High-speed digital-to-analog converters (DACs) most often use a transformer-coupled output stage. In applications where this configuration is not practical, a single op ampdifferential to single-ended stage has often been used. This application note steps through the exact design equations required to achieve gain matching from each output as well as a matched input impedance to each of the DA
模型线
系列: DAC902 (4)
制造商分类
- Semiconductors> Data Converters> Digital-to-Analog Converters (DACs)> High Speed DACs (>10MSPS)