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Documents DLPC4422
DLPS074 – FEBRUARY 2017 DLPC4422 DLP® Display Controller
1 Features 1 Provides Two 30-bit Input Pixel Interfaces or One
60-bit Input Pixel Interface:
– YUV, YCrCb, or RGB Data Format
– 8, 9 or 10 Bits per Color
– Pixel Clock Support Up to 175 MHz for 30-bit
and 160 MHz for 60-bit
Supports 24-30 Hz and 47-120 Hz Frame Rates
Full Single DLP Controller Support For DMDв„ўs
Up to 1920 Pixels Wide
Dual DLP Controller Support For Up to 4K Ultra
High Definition (UHD) Resolution Display Using
DLP660TE TRP DMD
High-Speed, Low Voltage Differential Signaling
(LVDS) DMD Interface
150 MHz ARM946в„ў Microprocessor
Microprocessor Peripherals …
