DS90C032
www.ti.com SNLS094D – JUNE 1998 – REVISED APRIL 2013 DS90C032 LVDS Quad CMOS Differential Line Receiver
Check for Samples: DS90C032 FEATURES DESCRIPTION TheDS90C032 is a quad CMOS differential line
receiver designed for applications requiring ultra low
power dissipation and high data rates. The device
supports data rates in excess of 155.5 Mbps (77.7
MHz) and uses Low Voltage Differential Signaling
(LVDS) technology. 1 2 >155.5 Mbps (77.7 MHz) switching rates
Accepts small swing (350 mV) differential
signal levels
Ultra low power dissipation
600 ps maximum differential skew (5V, 25В°C)
6.0 ns maximum propagation delay
Industrial operating temperature range
Military operating temperature range option
Available in surface mount packaging (SOIC)
and (LCCC)
Pin compatible with DS26C32A, MB570
(PECL), and 41LF (PECL)
Supports OPEN input fail-safe
Supports short and terminated input fail-safe
with the addition of external failsafe biasing
Compatible with IEEE 1596.3 SCI LVDS …
