DS90C032B
www.ti.com SNLS052C – MARCH 1999 – REVISED APRIL 2013 DS90C032B LVDS Quad CMOS Differential Line Receiver
Check for Samples: DS90C032B FEATURES DESCRIPTION The DS90C032B is a quad CMOS differential line
receiver designed for applications requiring ultra low
power dissipation and high data rates. The device
supports data rates in excess of 155.5 Mbps
(77.7 MHz) and uses Low Voltage Differential
Signaling (LVDS) technology. 1 2 >155.5 Mbps (77.7 MHz) Switching Rates
Accepts Small Swing (350 mV) Differential
Signal Levels
High Impedance LVDS Inputs with Power
Down
Ultra Low Power Dissipation
600 ps Maximum Differential Skew (5V, 25В°C)
6.0 ns Maximum Propagation Delay
Industrial Operating Temperature Range
Available in Surface Mount Packaging (SOIC)
Pin Compatible with DS26C32A, MB570 (PECL)
and 41LF (PECL)
Supports OPEN and Terminated Input Failsafe
Conforms to ANSI/TIA/EIA-644 LVDS Standard The DS90C032B accepts low voltage (350 mV)
differential input signals and translates them to
CMOS (TTL compatible) output levels. The receiver …
