Datasheet Texas Instruments DS90C365AMT — 数据表

制造商Texas Instruments
系列DS90C365A
零件号DS90C365AMT
Datasheet Texas Instruments DS90C365AMT

+ 3.3V可编程LVDS发送器18位平板显示器链接87.5 MHz 48-TSSOP -10至70

数据表

DS90C365A 3.3V Prog LVDS Transm 18-Bit FPD Link-87.5 MHz datasheet
PDF, 911 Kb, 修订版: I, 档案已发布: Apr 12, 2013
从文件中提取

价格

状态

Lifecycle StatusNRND (Not recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin48
Package TypeDGG
Industry STD TermTSSOP
JEDEC CodeR-PDSO-G
CarrierTUBE
Device MarkingDS90C365AMT
Width (mm)6.1
Length (mm)12.5
Thickness (mm)1.15
Pitch (mm).5
Max Height (mm)1.2
Mechanical Data下载

参数化

Color Depth18 bpp
FunctionTransmitter
Input CompatibilityLVCMOS,LVTTL
Operating Temperature Range-10 to 70 C
Output CompatibilityFPD-Link LVDS
Package GroupTSSOP
Package Size: mm2:W x L48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP) PKG
Pixel Clock Min18 MHz
Pixel Clock(Max)87.5 MHz
RatingCatalog
Total Throughput1785 Mbps

生态计划

RoHSNot Compliant

设计套件和评估模块

  • Evaluation Modules & Boards: FLINK3V8BT-85
    Evaluation Kit for FPD-Link Family of Serializer and Deserializer LVDS Devices
    Lifecycle Status: Active (Recommended for new designs)

应用须知

  • AN-1056 STN Application Using FPD-Link
    PDF, 85 Kb, 档案已发布: May 14, 2004
    Application Note 1056 STN Application Using FPD-Link
  • TFT Data Mapping for Dual Pixel LDI Application - Alternate A - Color Map
    PDF, 52 Kb, 档案已发布: May 15, 2004
    Application Note 1163 TFT Data Mapping for Dual Pixel LDI Application - Alternate A - Color Map
  • LVDS Display Interface (LDI) TFT Data Mapping for Interoperability w/FPD-Link
    PDF, 65 Kb, 档案已发布: May 14, 2004
    Application Note 1127 LVDS Display Interface (LDI) TFT Data Mapping for Interoperabil ity with FPD-Link
  • AN-1085 FPD-Link PCB and Interconnect Design-In Guidelines
    PDF, 344 Kb, 档案已发布: May 14, 2004
    Application Note 1085 FPD-Link PCB and Interconnect Design-In Guidelines
  • AN-1032 An Introduction to FPD-Link (Rev. C)
    PDF, 185 Kb, 修订版: C, 档案已发布: Aug 8, 2017
    The FPD-Linkchipsetarchitecturein conjunctionwith the LVDStechnologyprovidesthe highbandwidthinterfacenecessaryfor leadingedgedisplaytechnology.The conversionfromparallelTTL to serialLVDSallowsfor a narrowinterfacebetweengraphicscontrollerand panel.A narrowerinterfacemeanslowercablecost and simplifiesthe physicalconnectionthroug
  • Receiver Skew Margin for Channel Link I and FPD Link I Devices
    PDF, 418 Kb, 档案已发布: Jan 13, 2016

模型线

制造商分类

  • Semiconductors > Interface > FPD-Link SerDes > Display SerDes