Datasheet Texas Instruments DS90CF364MTDX/NOPB — 数据表

+ 3.3V LVDS接收器18位平板显示（FPD）链接-65 MHz 48-TSSOP -40至85

数据表

PDF, 1.1 Mb, 修订版: C, 档案已发布: Apr 12, 2013

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Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

Color Depth	18 bpp
Function	Receiver
Input Compatibility	FPD-Link LVDS
Operating Temperature Range	-40 to 85 C
Output Compatibility	LVCMOS,LVTTL
Package Group	TSSOP
Package Size: mm2:W x L	48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP) PKG
Pixel Clock Min	20 MHz
Pixel Clock(Max)	65 MHz
Rating	Catalog
Total Throughput	1300 Mbps

RoHS

Compliant

Evaluation Modules & Boards: FLINK3V8BT-85
Evaluation Kit for FPD-Link Family of Serializer and Deserializer LVDS Devices
Lifecycle Status: Active (Recommended for new designs)
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The FPD-Linkchipsetarchitecturein conjunctionwith the LVDStechnologyprovidesthe highbandwidthinterfacenecessaryfor leadingedgedisplaytechnology.The conversionfromparallelTTL to serialLVDSallowsfor a narrowinterfacebetweengraphicscontrollerand panel.A narrowerinterfacemeanslowercablecost and simplifiesthe physicalconnectionthroug

系列: DS90CF364 (2)