Datasheet Texas Instruments DS90CF386MTD — 数据表
| 制造商 | Texas Instruments |
| 系列 | DS90CF386 |
| 零件号 | DS90CF386MTD |
+ 3.3V LVDS接收器24位平板显示（FPD）链接-85 MHz 56-TSSOP -10至70
数据表
DS90CF3x6 3.3-V LVDS Receiver 24-Bit Or 18-Bit Flat Panel Display (FPD) Link, 85 MHz datasheet
PDF, 2.2 Mb, 修订版: J, 档案已发布: May 31, 2016
从文件中提取
价格
状态
| Lifecycle Status | NRND (Not recommended for new designs) |
| Manufacture's Sample Availability | No |
打包
| Pin | 56 | 56 |
| Package Type | DGG | DGG |
| Industry STD Term | TSSOP | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G |
| Package QTY | 34 | 34 |
| Carrier | TUBE | TUBE |
| Device Marking | DS90CF386MTD | >B |
| Width (mm) | 6.1 | 6.1 |
| Length (mm) | 14 | 14 |
| Thickness (mm) | 1.15 | 1.15 |
| Pitch (mm) | .5 | .5 |
| Max Height (mm) | 1.2 | 1.2 |
| Mechanical Data | 下载 | 下载 |
替代品
| Replacement | DS90CF386MTD/NOPB |
| Replacement Code | S |
参数化
| Color Depth | 24 bpp |
| Function | Receiver |
| Input Compatibility | FPD-Link LVDS |
| Operating Temperature Range | -10 to 70 C |
| Output Compatibility | LVCMOS |
| Package Group | TSSOP |
| Package Size: mm2:W x L | 56TSSOP: 113 mm2: 8.1 x 14(TSSOP) PKG |
| Pixel Clock Min | 20 MHz |
| Pixel Clock(Max) | 85 MHz |
| Rating | Catalog |
| Total Throughput | 2380 Mbps |
生态计划
| RoHS | See ti.com |
设计套件和评估模块
- Evaluation Modules & Boards: FLINK3V8BT-85
Evaluation Kit for FPD-Link Family of Serializer and Deserializer LVDS Devices
Lifecycle Status: Active (Recommended for new designs)
应用须知
- AN-1056 STN Application Using FPD-LinkPDF, 85 Kb, 档案已发布: May 14, 2004
Application Note 1056 STN Application Using FPD-Link - TFT Data Mapping for Dual Pixel LDI Application - Alternate A - Color MapPDF, 52 Kb, 档案已发布: May 15, 2004
Application Note 1163 TFT Data Mapping for Dual Pixel LDI Application - Alternate A - Color Map - LVDS Display Interface (LDI) TFT Data Mapping for Interoperability w/FPD-LinkPDF, 65 Kb, 档案已发布: May 14, 2004
Application Note 1127 LVDS Display Interface (LDI) TFT Data Mapping for Interoperabil ity with FPD-Link - AN-1085 FPD-Link PCB and Interconnect Design-In GuidelinesPDF, 344 Kb, 档案已发布: May 14, 2004
Application Note 1085 FPD-Link PCB and Interconnect Design-In Guidelines - AN-1032 An Introduction to FPD-Link (Rev. C)PDF, 185 Kb, 修订版: C, 档案已发布: Aug 8, 2017
The FPD-Linkchipsetarchitecturein conjunctionwith the LVDStechnologyprovidesthe highbandwidthinterfacenecessaryfor leadingedgedisplaytechnology.The conversionfromparallelTTL to serialLVDSallowsfor a narrowinterfacebetweengraphicscontrollerand panel.A narrowerinterfacemeanslowercablecost and simplifiesthe physicalconnectionthroug - Receiver Skew Margin for Channel Link I and FPD Link I DevicesPDF, 418 Kb, 档案已发布: Jan 13, 2016
模型线
系列: DS90CF386 (5)
制造商分类
- Semiconductors > Interface > FPD-Link SerDes > Display SerDes