Datasheet Texas Instruments DS90UA102-Q1 — 数据表
| 制造商 | Texas Instruments |
| 系列 | DS90UA102-Q1 |
多通道数字音频解串器
数据表
DS90UA102-Q1 Multi-Channel Digital Audio Deserializer datasheet
PDF, 1.1 Mb, 修订版: A, 档案已发布: Sep 13, 2013
从文件中提取
价格
状态
| DS90UA102TRHSJQ1 | DS90UA102TRHSRQ1 | DS90UA102TRHSTQ1 | |
|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes | No | No |
打包
| DS90UA102TRHSJQ1 | DS90UA102TRHSRQ1 | DS90UA102TRHSTQ1 | |
|---|---|---|---|
| N | 1 | 2 | 3 |
| Pin | 48 | 48 | 48 |
| Package Type | RHS | RHS | RHS |
| Industry STD Term | WQFN | WQFN | WQFN |
| JEDEC Code | S-PQFP-N | S-PQFP-N | S-PQFP-N |
| Package QTY | 2500 | 1000 | 250 |
| Carrier | LARGE T&R | LARGE T&R | SMALL T&R |
| Device Marking | UA102Q | UA102Q | UA102Q |
| Width (mm) | 7 | 7 | 7 |
| Length (mm) | 7 | 7 | 7 |
| Thickness (mm) | .75 | .75 | .75 |
| Pitch (mm) | .5 | .5 | .5 |
| Max Height (mm) | .8 | .8 | .8 |
| Mechanical Data | 下载 | 下载 | 下载 |
参数化
| Parameters / Models | DS90UA102TRHSJQ1 | DS90UA102TRHSRQ1 | DS90UA102TRHSTQ1 |
|---|---|---|---|
| Color Depth, bpp | 8 | 8 | 8 |
| Diagnostics | BIST | BIST | BIST |
| EMI Reduction | LVDS,SSCG,Staggered Outputs | LVDS,SSCG,Staggered Outputs | LVDS,SSCG,Staggered Outputs |
| Function | Deserializer | Deserializer | Deserializer |
| Input Compatibility | FPD-Link III LVDS | FPD-Link III LVDS | FPD-Link III LVDS |
| Operating Temperature Range, C | -40 to 105 | -40 to 105 | -40 to 105 |
| Output Compatibility | LVCMOS | LVCMOS | LVCMOS |
| Package Group | WQFN | WQFN | WQFN |
| Package Size: mm2:W x L, PKG | 48WQFN: 49 mm2: 7 x 7(WQFN) | 48WQFN: 49 mm2: 7 x 7(WQFN) | 48WQFN: 49 mm2: 7 x 7(WQFN) |
| Pixel Clock Min, MHz | 10 | 10 | 10 |
| Pixel Clock(Max), MHz | 50 | 50 | 50 |
| Rating | Automotive | Automotive | Automotive |
| Signal Conditioning | Adaptive Equalizer,Programmable Equalizer | Adaptive Equalizer,Programmable Equalizer | Adaptive Equalizer,Programmable Equalizer |
| Special Features | CRC,Dedicated GPIO,FPD-Link III Coax,I2C Config,I2S Audio,TDM Audio | CRC,Dedicated GPIO,FPD-Link III Coax,I2C Config,I2S Audio,TDM Audio | CRC,Dedicated GPIO,FPD-Link III Coax,I2C Config,I2S Audio,TDM Audio |
| Total Throughput, Mbps | 600 | 600 | 600 |
生态计划
| DS90UA102TRHSJQ1 | DS90UA102TRHSRQ1 | DS90UA102TRHSTQ1 | |
|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant |
应用须知
- I2C Communication Over FPD-Link III with Bidirectional Control Channel (Rev. A)PDF, 53 Kb, 修订版: A, 档案已发布: Apr 26, 2013
This application note describes communication between devices using the FPD-Link III SerDes with a bidirectional control channel using I2C. The low latency bidirectional control interface allows the master I2C device to remotely control peripherals across the serial link.
模型线
系列: DS90UA102-Q1 (3)
制造商分类
- Semiconductors> Interface> Display & Imaging SerDes> FPD-Link III SerDes