Datasheet Texas Instruments DS90UR907Q-Q1 — 数据表
| 制造商 | Texas Instruments |
| 系列 | DS90UR907Q-Q1 |
5-65 MHz 24位彩色FPD-Link至FPD-Link II转换器
数据表
DS90UR907Q-Q1 5 to 65-MHz, 24-Bit Color FPD-Link to FPD-Link II Converter datasheet
PDF, 1.2 Mb, 修订版: G, 档案已发布: Dec 31, 2015
从文件中提取
价格
状态
| DS90UR907QSQ/NOPB | DS90UR907QSQE/NOPB | DS90UR907QSQX/NOPB | |
|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes | Yes | No |
打包
| DS90UR907QSQ/NOPB | DS90UR907QSQE/NOPB | DS90UR907QSQX/NOPB | |
|---|---|---|---|
| N | 1 | 2 | 3 |
| Pin | 36 | 36 | 36 |
| Package Type | NJK | NJK | NJK |
| Package QTY | 1000 | 250 | 2500 |
| Carrier | LARGE T&R | SMALL T&R | LARGE T&R |
| Device Marking | UR907QSQ | UR907QSQ | UR907QSQ |
参数化
| Parameters / Models | DS90UR907QSQ/NOPB | DS90UR907QSQE/NOPB | DS90UR907QSQX/NOPB |
|---|---|---|---|
| Color Depth, bpp | 24 | 24 | 24 |
| Diagnostics | BIST,I2C Bus | BIST,I2C Bus | BIST,I2C Bus |
| EMI Reduction | LVDS Inputs | LVDS Inputs | LVDS Inputs |
| Function | Serializer | Serializer | Serializer |
| Input Compatibility | FPD-Link LVDS | FPD-Link LVDS | FPD-Link LVDS |
| Operating Temperature Range, C | -40 to 105 | -40 to 105 | -40 to 105 |
| Output Compatibility | FPD-Link II LVDS | FPD-Link II LVDS | FPD-Link II LVDS |
| Pixel Clock Min, MHz | 5 | 5 | 5 |
| Pixel Clock(Max), MHz | 65 | 65 | 65 |
| Rating | Automotive | Automotive | Automotive |
| Signal Conditioning | De-Emphasis,VOD Select | De-Emphasis,VOD Select | De-Emphasis,VOD Select |
| Special Features | 1.8V or 3.3V VDDIO,I2C Config | 1.8V or 3.3V VDDIO,I2C Config | 1.8V or 3.3V VDDIO,I2C Config |
| Total Throughput, Mbps | 1560 | 1560 | 1560 |
生态计划
| DS90UR907QSQ/NOPB | DS90UR907QSQE/NOPB | DS90UR907QSQX/NOPB | |
|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant |
应用须知
- AN-1807 FPD-Link II Display SerDes Overview (Rev. B)PDF, 45 Kb, 修订版: B, 档案已发布: Apr 26, 2013
TI’s FPD-Link II family of embedded clock LVDS SerDes provide enhanced features, and improved signal quality over prior generations of FPD-Link SerDes devices for Display applications. FPD-Link Chipsets serialized the wide parallel RGB buses down to 4 or 5 pairs of LVDS signaling depending upon the chipset. 18-bit RGB was serialized to three LVDS data lines and a LVDS clock, while 24-bit RGB was s - LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A)PDF, 101 Kb, 修订版: A, 档案已发布: Apr 29, 2013
This application note introduces Texas Instrument’s LVDS devices with built-in pre-emphasis andequalization circuits, recommends when it makes sense to employ them with the FPD-Link II SER/DES,shows how to optimally interface them to the SER/DES, and discusses distance gains that may berealized with their signal enhancing functions. - Extending the Reach of a FPD-Link II Interface with Cable Drivers and Equalizers (Rev. A)PDF, 118 Kb, 修订版: A, 档案已发布: Apr 26, 2013
TI's family of embedded clock LVDS SER/DES (FPD-link II) provides a 2-wire serial interface for displayapplications up to distances of 10 meters.
模型线
系列: DS90UR907Q-Q1 (3)
制造商分类
- Semiconductors> Interface> Display & Imaging SerDes> FPD-Link II SerDes