Datasheet Texas Instruments DS92CK16 — 数据表
| 制造商 | Texas Instruments |
| 系列 | DS92CK16 |
3V BLVDS 1至6时钟缓冲器/总线收发器
数据表
DS92CK16 3V BLVDS 1 to 6 Clock Buffer/Bus Transceiver datasheet
PDF, 914 Kb, 修订版: C, 档案已发布: Apr 13, 2013
从文件中提取
价格
状态
| DS92CK16TMTC | DS92CK16TMTC/NOPB | DS92CK16TMTCX/NOPB | |
|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No | Yes |
打包
| DS92CK16TMTC | DS92CK16TMTC/NOPB | DS92CK16TMTCX/NOPB | |
|---|---|---|---|
| N | 1 | 2 | 3 |
| Pin | 24 | 24 | 24 |
| Package Type | PW | PW | PW |
| Industry STD Term | TSSOP | TSSOP | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 61 | 61 | 2500 |
| Carrier | TUBE | TUBE | LARGE T&R |
| Device Marking | DS92CK16T | DS92CK16T | DS92CK16T |
| Width (mm) | 4.4 | 4.4 | 4.4 |
| Length (mm) | 7.8 | 7.8 | 7.8 |
| Thickness (mm) | 1 | 1 | 1 |
| Pitch (mm) | .65 | .65 | .65 |
| Max Height (mm) | 1.2 | 1.2 | 1.2 |
| Mechanical Data | 下载 | 下载 | 下载 |
参数化
| Parameters / Models | DS92CK16TMTC | DS92CK16TMTC/NOPB | DS92CK16TMTCX/NOPB |
|---|---|---|---|
| Input Frequency(Max), MHz | 125 | 125 | 125 |
| Input Level | LVDS,LVTTL | LVDS,LVTTL | LVDS,LVTTL |
| Number of Outputs | 6 | 6 | 6 |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 |
| Output Frequency(Max), MHz | 125 | 125 | 125 |
| Output Level | LVCMOS | LVCMOS | LVCMOS |
| Package Group | TSSOP | TSSOP | TSSOP |
| Package Size: mm2:W x L, PKG | 24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP) | 24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP) | 24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP) |
| Rating | Catalog | Catalog | Catalog |
| VCC, V | 3.3 | 3.3 | 3.3 |
| VCC Out, V | 3.3 | 3.3 | 3.3 |
生态计划
| DS92CK16TMTC | DS92CK16TMTC/NOPB | DS92CK16TMTCX/NOPB | |
|---|---|---|---|
| RoHS | See ti.com | Compliant | Compliant |
应用须知
- High Speed BUS LVDS Clock Distri Using DS92CK16 Clock Distri (Rev. B)PDF, 412 Kb, 修订版: B, 档案已发布: Apr 26, 2013
The high data rates in today's systems require extremely low skew clock distribution at a destination on a backplane logic card. Many systems also require a local clock to be distributed across a backplane. Therefore, creating a local distribution of clock signals with low-skew as well as providing a high-speed clock capable of driving a backplane is a must.
模型线
系列: DS92CK16 (3)
制造商分类
- Semiconductors> Clock and Timing> Clock Buffers> Differential