Datasheet Texas Instruments DS92LV1224 — 数据表

制造商Texas Instruments
系列DS92LV1224
Datasheet Texas Instruments DS92LV1224

30-66 MHz 10位解串器

数据表

DS92LV1224 30-66 MHz 10 Bit Bus LVDS Deserializer datasheet
PDF, 1.2 Mb, 修订版: A, 档案已发布: Apr 16, 2013
从文件中提取

价格

状态

DS92LV1224TMSADS92LV1224TMSA/NOPBDS92LV1224TMSAX/NOPB
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesNoNo

打包

DS92LV1224TMSADS92LV1224TMSA/NOPBDS92LV1224TMSAX/NOPB
N123
Pin282828
Package TypeDBDBDB
Industry STD TermSSOPSSOPSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY47472000
CarrierTUBETUBELARGE T&R
Device MarkingMSAMSADS92LV1224T
Width (mm)5.35.35.3
Length (mm)10.210.210.2
Thickness (mm)1.951.951.95
Pitch (mm).65.65.65
Max Height (mm)222
Mechanical Data下载下载下载

参数化

Parameters / ModelsDS92LV1224TMSA
DS92LV1224TMSA
DS92LV1224TMSA/NOPB
DS92LV1224TMSA/NOPB
DS92LV1224TMSAX/NOPB
DS92LV1224TMSAX/NOPB
ESD, kV222
FunctionDeserializerDeserializerDeserializer
Input CompatibilityLVDS,BLVDSLVDS,BLVDSLVDS,BLVDS
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85
Output CompatibilityLVTTLLVTTLLVTTL
Package GroupSSOPSSOPSSOP
Package Size: mm2:W x L, PKG28SSOP: 80 mm2: 7.8 x 10.2(SSOP)28SSOP: 80 mm2: 7.8 x 10.2(SSOP)28SSOP: 80 mm2: 7.8 x 10.2(SSOP)
ProtocolsChannel-Link IChannel-Link IChannel-Link I
RatingCatalogCatalogCatalog
Supply Voltage(s), V3.33.33.3

生态计划

DS92LV1224TMSADS92LV1224TMSA/NOPBDS92LV1224TMSAX/NOPB
RoHSSee ti.comCompliantCompliant

应用须知

  • How to Validate BLVDS SER/DES Signal Integrity Using an Eye Mask (Rev. A)
    PDF, 2.0 Mb, 修订版: A, 档案已发布: Apr 26, 2013
    The following application report contains information that will help you validate signal quality on a BLVDS SER/DES link. How to capture an eye pattern, how to generate an eye mask, and how to validate signal quality are all explained in detail in this document.
  • DS15BA101 & DS15EA101 Enable Long Reach Applications for Embedded Clock SER/DES (Rev. E)
    PDF, 170 Kb, 修订版: E, 档案已发布: Apr 29, 2013
    Reduction in system size, increase in system performance and savings in system cost are valuablebenefits that SER/DES devices (Serializers and Deserializers) bring to many system designers. Thesebenefits are the reason why SER/DES are integral pieces of many of today’s high-speed systems.One of the design constraints for these systems is the maximum transmission distance between a serializer

模型线

制造商分类

  • Semiconductors> Interface> Serializer, Deserializer> BLVDS/LVDS SerDes (<100 MHz)